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author | Evan Cheng <evan.cheng@apple.com> | 2008-02-02 04:07:54 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-02-02 04:07:54 +0000 |
commit | efd142a92081d25766cccb493f0580d0d05ec19e (patch) | |
tree | 40e210f72b4ec27f5093bd8a1082ff590c996156 /llvm/utils/TableGen | |
parent | 8df7cc1119f6613336b5281921341c6f83a90c6f (diff) | |
download | bcm5719-llvm-efd142a92081d25766cccb493f0580d0d05ec19e.tar.gz bcm5719-llvm-efd142a92081d25766cccb493f0580d0d05ec19e.zip |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
llvm-svn: 46659
Diffstat (limited to 'llvm/utils/TableGen')
-rw-r--r-- | llvm/utils/TableGen/AsmWriterEmitter.cpp | 3 | ||||
-rw-r--r-- | llvm/utils/TableGen/CodeEmitterGen.cpp | 3 | ||||
-rw-r--r-- | llvm/utils/TableGen/CodeGenTarget.cpp | 6 | ||||
-rw-r--r-- | llvm/utils/TableGen/DAGISelEmitter.cpp | 25 | ||||
-rw-r--r-- | llvm/utils/TableGen/InstrInfoEmitter.cpp | 1 |
5 files changed, 38 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp index e3d806ade2b..eac7bd63267 100644 --- a/llvm/utils/TableGen/AsmWriterEmitter.cpp +++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp @@ -625,6 +625,9 @@ void AsmWriterEmitter::run(std::ostream &O) { << " } else if (MI->getOpcode() == TargetInstrInfo::LABEL) {\n" << " printLabel(MI);\n" << " return true;\n" + << " } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n" + << " printDeclare(MI);\n" + << " return true;\n" << " }\n\n"; O << " // Emit the opcode for the instruction.\n" diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp index ddf8eeb84aa..60d196cb4aa 100644 --- a/llvm/utils/TableGen/CodeEmitterGen.cpp +++ b/llvm/utils/TableGen/CodeEmitterGen.cpp @@ -27,6 +27,7 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) { if (R->getName() == "PHI" || R->getName() == "INLINEASM" || R->getName() == "LABEL" || + R->getName() == "DECLARE" || R->getName() == "EXTRACT_SUBREG" || R->getName() == "INSERT_SUBREG") continue; @@ -100,6 +101,7 @@ void CodeEmitterGen::run(std::ostream &o) { if (R->getName() == "PHI" || R->getName() == "INLINEASM" || R->getName() == "LABEL" || + R->getName() == "DECLARE" || R->getName() == "EXTRACT_SUBREG" || R->getName() == "INSERT_SUBREG") { o << " 0U"; @@ -132,6 +134,7 @@ void CodeEmitterGen::run(std::ostream &o) { if (InstName == "PHI" || InstName == "INLINEASM" || InstName == "LABEL"|| + InstName == "DECLARE"|| InstName == "EXTRACT_SUBREG" || InstName == "INSERT_SUBREG") continue; diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index bc758b75cdd..b9730a5bd90 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -290,6 +290,10 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!"; const CodeGenInstruction *LABEL = &I->second; + I = getInstructions().find("DECLARE"); + if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!"; + const CodeGenInstruction *DECLARE = &I->second; + I = getInstructions().find("EXTRACT_SUBREG"); if (I == Instructions.end()) throw "Could not find 'EXTRACT_SUBREG' instruction!"; @@ -304,12 +308,14 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> NumberedInstructions.push_back(PHI); NumberedInstructions.push_back(INLINEASM); NumberedInstructions.push_back(LABEL); + NumberedInstructions.push_back(DECLARE); NumberedInstructions.push_back(EXTRACT_SUBREG); NumberedInstructions.push_back(INSERT_SUBREG); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) if (&II->second != PHI && &II->second != INLINEASM && &II->second != LABEL && + &II->second != DECLARE && &II->second != EXTRACT_SUBREG && &II->second != INSERT_SUBREG) NumberedInstructions.push_back(&II->second); diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp index ae62c9fcb22..493330a689f 100644 --- a/llvm/utils/TableGen/DAGISelEmitter.cpp +++ b/llvm/utils/TableGen/DAGISelEmitter.cpp @@ -1779,6 +1779,30 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) { << " MVT::Other, Ops, 3);\n" << "}\n\n"; + OS << "SDNode *Select_DECLARE(const SDOperand &N) {\n" + << " MachineModuleInfo *MMI = CurDAG->getMachineModuleInfo();\n" + << " SDOperand Chain = N.getOperand(0);\n" + << " SDOperand N1 = N.getOperand(1);\n" + << " SDOperand N2 = N.getOperand(2);\n" + << " if (!isa<FrameIndexSDNode>(N1) || !isa<GlobalAddressSDNode>(N2)) {\n" + << " cerr << \"Cannot yet select llvm.dbg.declare: \";\n" + << " N.Val->dump(CurDAG);\n" + << " abort();\n" + << " }\n" + << " int FI = cast<FrameIndexSDNode>(N1)->getIndex();\n" + << " GlobalValue *GV = cast<GlobalAddressSDNode>(N2)->getGlobal();\n" + << " // FIXME. Handle variable declarations later since it lives on.\n" + << " MMI->RecordVariable(GV, FI);\n" + << " SDOperand Tmp1 = " + << "CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());\n" + << " SDOperand Tmp2 = " + << "CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());\n" + << " AddToISelQueue(Chain);\n" + << " SDOperand Ops[] = { Tmp1, Tmp2, Chain };\n" + << " return CurDAG->getTargetNode(TargetInstrInfo::DECLARE,\n" + << " MVT::Other, Ops, 3);\n" + << "}\n\n"; + OS << "SDNode *Select_EXTRACT_SUBREG(const SDOperand &N) {\n" << " SDOperand N0 = N.getOperand(0);\n" << " SDOperand N1 = N.getOperand(1);\n" @@ -1846,6 +1870,7 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) { << " }\n" << " case ISD::INLINEASM: return Select_INLINEASM(N);\n" << " case ISD::LABEL: return Select_LABEL(N);\n" + << " case ISD::DECLARE: return Select_DECLARE(N);\n" << " case ISD::EXTRACT_SUBREG: return Select_EXTRACT_SUBREG(N);\n" << " case ISD::INSERT_SUBREG: return Select_INSERT_SUBREG(N);\n"; diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp index 5bf25d17451..3be36266f70 100644 --- a/llvm/utils/TableGen/InstrInfoEmitter.cpp +++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp @@ -409,6 +409,7 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val, if (R->getName() != "PHI" && R->getName() != "INLINEASM" && R->getName() != "LABEL" && + R->getName() != "DECLARE" && R->getName() != "EXTRACT_SUBREG" && R->getName() != "INSERT_SUBREG") throw R->getName() + " doesn't have a field named '" + |