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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-03-24 19:18:29 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-03-24 19:18:29 +0000 |
| commit | edd1ca203b1ee622c3b027d14a94867269a13c55 (patch) | |
| tree | 459b0d13dabf981bbcb4d10dde6320dfc78d11b9 /llvm/utils/TableGen | |
| parent | 4994bc0474d62ad742329584af5e230e5c56649d (diff) | |
| download | bcm5719-llvm-edd1ca203b1ee622c3b027d14a94867269a13c55.tar.gz bcm5719-llvm-edd1ca203b1ee622c3b027d14a94867269a13c55.zip | |
Revert r298652 on Quentin's request
llvm-svn: 298727
Diffstat (limited to 'llvm/utils/TableGen')
| -rw-r--r-- | llvm/utils/TableGen/RegisterInfoEmitter.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index 6ab38b6e124..b75be13c048 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -1025,12 +1025,16 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, for (const auto &RC : RegisterClasses) { // Asserts to make sure values will fit in table assuming types from // MCRegisterInfo.h + assert((RC.SpillSize/8) <= 0xffff && "SpillSize too large."); + assert((RC.SpillAlignment/8) <= 0xffff && "SpillAlignment too large."); assert(RC.CopyCost >= -128 && RC.CopyCost <= 127 && "Copy cost too large."); OS << " { " << RC.getName() << ", " << RC.getName() << "Bits, " << RegClassStrings.get(RC.getName()) << ", " << RC.getOrder().size() << ", sizeof(" << RC.getName() << "Bits), " << RC.getQualifiedName() + "RegClassID" << ", " + << RC.SpillSize/8 << ", " + << RC.SpillAlignment/8 << ", " << RC.CopyCost << ", " << ( RC.Allocatable ? "true" : "false" ) << " },\n"; } @@ -1312,13 +1316,9 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, << " { // Register class instances\n"; for (const auto &RC : RegisterClasses) { - assert(isUInt<16>(RC.SpillSize/8) && "SpillSize too large."); - assert(isUInt<16>(RC.SpillAlignment/8) && "SpillAlignment too large."); OS << " extern const TargetRegisterClass " << RC.getName() << "RegClass = {\n " << '&' << Target.getName() << "MCRegisterClasses[" << RC.getName() << "RegClassID],\n " - << RC.SpillSize/8 << ", /* SpillSize */\n " - << RC.SpillAlignment/8 << ", /* SpillAlignment */\n " << "VTLists + " << VTSeqs.get(RC.VTs) << ",\n " << RC.getName() << "SubClassMask,\n SuperRegIdxSeqs + " << SuperRegIdxSeqs.get(SuperRegIdxLists[RC.EnumValue]) << ",\n "; |
