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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-09-06 00:05:58 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-09-06 00:05:58 +0000
commit9ceb6edf1145fca5dc43dc486f9129d9b8e01b8e (patch)
tree7fe0bfee248028a941abb8db4ae3891e68969006 /llvm/utils/TableGen
parent60c8b8bcf232cfb0537f3d6638d8f36c29ef7095 (diff)
downloadbcm5719-llvm-9ceb6edf1145fca5dc43dc486f9129d9b8e01b8e.tar.gz
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GlobalISel/TableGen: Fix handling of EXTRACT_SUBREG constraints
This was only using the correct register constraints if this was the final result instruction. If the extract was a sub instruction of the result, it would attempt to use GIR_ConstrainSelectedInstOperands on a COPY, which won't work. Move the handling to createAndImportSubInstructionRenderer so it works correctly. I don't fully understand why runOnPattern and createAndImportSubInstructionRenderer both need to handle these special cases, and constrain them with slightly different methods. If I remove the runOnPattern handling, it does break the constraint when the final result instruction is EXTRACT_SUBREG. llvm-svn: 371150
Diffstat (limited to 'llvm/utils/TableGen')
-rw-r--r--llvm/utils/TableGen/GlobalISelEmitter.cpp66
1 files changed, 47 insertions, 19 deletions
diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index 899ad5ed298..cf30da53932 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -3203,6 +3203,8 @@ private:
inferSuperRegisterClassForNode(const TypeSetByHwMode &Ty,
TreePatternNode *SuperRegNode,
TreePatternNode *SubRegIdxNode);
+ Optional<CodeGenSubRegIndex *>
+ inferSubRegIndexForNode(TreePatternNode *SubRegIdxNode);
/// Infer a CodeGenRegisterClass which suppoorts \p Ty and \p SubRegIdxNode.
/// Return None if no such class exists.
@@ -3954,6 +3956,33 @@ GlobalISelEmitter::createAndImportSubInstructionRenderer(
return InsertPtOrError.get();
}
+ if (OpName == "EXTRACT_SUBREG") {
+ // EXTRACT_SUBREG selects into a subregister COPY but unlike most
+ // instructions, the result register class is controlled by the
+ // subregisters of the operand. As a result, we must constrain the result
+ // class rather than check that it's already the right one.
+ auto SuperClass = inferRegClassFromPattern(Dst->getChild(0));
+ if (!SuperClass)
+ return failedImport(
+ "Cannot infer register class from EXTRACT_SUBREG operand #0");
+
+ auto SubIdx = inferSubRegIndexForNode(Dst->getChild(1));
+ if (!SubIdx)
+ return failedImport("EXTRACT_SUBREG child #1 is not a subreg index");
+
+ const auto &SrcRCDstRCPair =
+ (*SuperClass)->getMatchingSubClassWithSubRegs(CGRegs, *SubIdx);
+ assert(SrcRCDstRCPair->second && "Couldn't find a matching subclass");
+ M.insertAction<ConstrainOperandToRegClassAction>(
+ InsertPt, DstMIBuilder.getInsnID(), 0, *SrcRCDstRCPair->second);
+ M.insertAction<ConstrainOperandToRegClassAction>(
+ InsertPt, DstMIBuilder.getInsnID(), 1, *SrcRCDstRCPair->first);
+
+ // We're done with this pattern! It's eligible for GISel emission; return
+ // it.
+ return InsertPtOrError.get();
+ }
+
// Similar to INSERT_SUBREG, we also have to handle SUBREG_TO_REG as a
// subinstruction.
if (OpName == "SUBREG_TO_REG") {
@@ -4259,6 +4288,17 @@ GlobalISelEmitter::inferSuperRegisterClassForNode(
return inferSuperRegisterClass(Ty, SubRegIdxNode);
}
+Optional<CodeGenSubRegIndex *>
+GlobalISelEmitter::inferSubRegIndexForNode(TreePatternNode *SubRegIdxNode) {
+ if (!SubRegIdxNode->isLeaf())
+ return None;
+
+ DefInit *SubRegInit = dyn_cast<DefInit>(SubRegIdxNode->getLeafValue());
+ if (!SubRegInit)
+ return None;
+ return CGRegs.getSubRegIdx(SubRegInit->getDef());
+}
+
Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
// Keep track of the matchers and actions to emit.
int Score = P.getPatternComplexity(CGP);
@@ -4457,27 +4497,15 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
}
if (DstIName == "EXTRACT_SUBREG") {
- // EXTRACT_SUBREG selects into a subregister COPY but unlike most
- // instructions, the result register class is controlled by the
- // subregisters of the operand. As a result, we must constrain the result
- // class rather than check that it's already the right one.
- if (!Dst->getChild(0)->isLeaf())
- return failedImport("EXTRACT_SUBREG child #1 is not a leaf");
+ auto SuperClass = inferRegClassFromPattern(Dst->getChild(0));
+ if (!SuperClass)
+ return failedImport(
+ "Cannot infer register class from EXTRACT_SUBREG operand #0");
- DefInit *SubRegInit = dyn_cast<DefInit>(Dst->getChild(1)->getLeafValue());
- if (!SubRegInit)
+ auto SubIdx = inferSubRegIndexForNode(Dst->getChild(1));
+ if (!SubIdx)
return failedImport("EXTRACT_SUBREG child #1 is not a subreg index");
- // Constrain the result to the same register bank as the operand.
- Record *DstIOpRec =
- getInitValueAsRegClass(Dst->getChild(0)->getLeafValue());
-
- if (DstIOpRec == nullptr)
- return failedImport("EXTRACT_SUBREG operand #1 isn't a register class");
-
- CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef());
- CodeGenRegisterClass *SrcRC = CGRegs.getRegClass(DstIOpRec);
-
// It would be nice to leave this constraint implicit but we're required
// to pick a register class so constrain the result to a register class
// that can hold the correct MVT.
@@ -4488,7 +4516,7 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
"Expected Src of EXTRACT_SUBREG to have one result type");
const auto &SrcRCDstRCPair =
- SrcRC->getMatchingSubClassWithSubRegs(CGRegs, SubIdx);
+ (*SuperClass)->getMatchingSubClassWithSubRegs(CGRegs, *SubIdx);
assert(SrcRCDstRCPair->second && "Couldn't find a matching subclass");
M.addAction<ConstrainOperandToRegClassAction>(0, 0, *SrcRCDstRCPair->second);
M.addAction<ConstrainOperandToRegClassAction>(0, 1, *SrcRCDstRCPair->first);
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