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authorAndrew Trick <atrick@apple.com>2012-08-08 02:44:16 +0000
committerAndrew Trick <atrick@apple.com>2012-08-08 02:44:16 +0000
commit352abc19a55eccdf75ab35a7c379b777c36f4166 (patch)
treef48550de2312e7675c50b7557f0e9cd1d732ad3a /llvm/utils/TableGen
parentdb9b1b5e66646f8fe03a98e800c73666f0008257 (diff)
downloadbcm5719-llvm-352abc19a55eccdf75ab35a7c379b777c36f4166.tar.gz
bcm5719-llvm-352abc19a55eccdf75ab35a7c379b777c36f4166.zip
Added MispredictPenalty to SchedMachineModel.
This replaces an existing subtarget hook on ARM and allows standard CodeGen passes to potentially use the property. llvm-svn: 161471
Diffstat (limited to 'llvm/utils/TableGen')
-rw-r--r--llvm/utils/TableGen/SubtargetEmitter.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index b3bf4aa14ce..34723439596 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -590,6 +590,7 @@ void SubtargetEmitter::EmitProcessorModels(raw_ostream &OS) {
EmitProcessorProp(OS, PI->ModelDef, "MinLatency", ',');
EmitProcessorProp(OS, PI->ModelDef, "LoadLatency", ',');
EmitProcessorProp(OS, PI->ModelDef, "HighLatency", ',');
+ EmitProcessorProp(OS, PI->ModelDef, "MispredictPenalty", ',');
if (SchedModels.hasItineraryClasses())
OS << " " << PI->ItinsDef->getName();
else
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