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authorCraig Topper <craig.topper@intel.com>2019-03-10 05:21:52 +0000
committerCraig Topper <craig.topper@intel.com>2019-03-10 05:21:52 +0000
commit1a872f2b15157dc8a85aac85167d08b73cef1e76 (patch)
tree8d74e5597c513655d6a5cf60a1286a2f2e46758a /llvm/utils/TableGen
parentb68566aec32d7bf361a51183b4f161d14e50f0c6 (diff)
downloadbcm5719-llvm-1a872f2b15157dc8a85aac85167d08b73cef1e76.tar.gz
bcm5719-llvm-1a872f2b15157dc8a85aac85167d08b73cef1e76.zip
Recommit r355224 "[TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/immAllOnesV. Remove bitcasts from X86 patterns that are no longer necessary."
Includes a fix to emit a CheckOpcode for build_vector when immAllZerosV/immAllOnesV is used as a pattern root. This means it can't be used to look through bitcasts when used as a root, but that's probably ok. This extra CheckOpcode will ensure that the first match in the isel table will be a SwitchOpcode which is needed by the caching optimization in the ISel Matcher. Original commit message: Previously we had build_vector PatFrags that called ISD::isBuildVectorAllZeros/Ones. Internally the ISD::isBuildVectorAllZeros/Ones look through bitcasts, but we aren't able to take advantage of that in isel. Instead of we have to canonicalize the types of the all zeros/ones build_vectors and insert bitcasts. Then we have to pattern match those exact bitcasts. By emitting specific matchers for these 2 nodes, we can make isel look through any bitcasts without needing to explicitly match them. We should also be able to remove the canonicalization to vXi32 from lowering, but I've left that for a follow up. This removes something like 40,000 bytes from the X86 isel table. Differential Revision: https://reviews.llvm.org/D58595 llvm-svn: 355784
Diffstat (limited to 'llvm/utils/TableGen')
-rw-r--r--llvm/utils/TableGen/CodeGenDAGPatterns.cpp16
-rw-r--r--llvm/utils/TableGen/DAGISelMatcher.cpp10
-rw-r--r--llvm/utils/TableGen/DAGISelMatcher.h34
-rw-r--r--llvm/utils/TableGen/DAGISelMatcherEmitter.cpp10
-rw-r--r--llvm/utils/TableGen/DAGISelMatcherGen.cpp21
5 files changed, 90 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index 19a7874ee1f..0b1687d3e92 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -1281,6 +1281,17 @@ std::string TreePredicateFn::getCodeToRunOnSDNode() const {
// PatternToMatch implementation
//
+static bool isImmAllOnesAllZerosMatch(const TreePatternNode *P) {
+ if (!P->isLeaf())
+ return false;
+ DefInit *DI = dyn_cast<DefInit>(P->getLeafValue());
+ if (!DI)
+ return false;
+
+ Record *R = DI->getDef();
+ return R->getName() == "immAllOnesV" || R->getName() == "immAllZerosV";
+}
+
/// getPatternSize - Return the 'size' of this pattern. We want to match large
/// patterns before small ones. This is used to determine the size of a
/// pattern.
@@ -1320,6 +1331,8 @@ static unsigned getPatternSize(const TreePatternNode *P,
Size += 5; // Matches a ConstantSDNode (+3) and a specific value (+2).
else if (Child->getComplexPatternInfo(CGP))
Size += getPatternSize(Child, CGP);
+ else if (isImmAllOnesAllZerosMatch(Child))
+ Size += 4; // Matches a build_vector(+3) and a predicate (+1).
else if (!Child->getPredicateCalls().empty())
++Size;
}
@@ -2126,7 +2139,8 @@ static TypeSetByHwMode getImplicitType(Record *R, unsigned ResNo,
}
if (R->getName() == "node" || R->getName() == "srcvalue" ||
- R->getName() == "zero_reg") {
+ R->getName() == "zero_reg" || R->getName() == "immAllOnesV" ||
+ R->getName() == "immAllZerosV") {
// Placeholder.
return TypeSetByHwMode(); // Unknown.
}
diff --git a/llvm/utils/TableGen/DAGISelMatcher.cpp b/llvm/utils/TableGen/DAGISelMatcher.cpp
index 92b4c4222c3..0c45ff1353c 100644
--- a/llvm/utils/TableGen/DAGISelMatcher.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcher.cpp
@@ -237,6 +237,16 @@ void CheckFoldableChainNodeMatcher::printImpl(raw_ostream &OS,
OS.indent(indent) << "CheckFoldableChainNode\n";
}
+void CheckImmAllOnesVMatcher::printImpl(raw_ostream &OS,
+ unsigned indent) const {
+ OS.indent(indent) << "CheckAllOnesV\n";
+}
+
+void CheckImmAllZerosVMatcher::printImpl(raw_ostream &OS,
+ unsigned indent) const {
+ OS.indent(indent) << "CheckAllZerosV\n";
+}
+
void EmitIntegerMatcher::printImpl(raw_ostream &OS, unsigned indent) const {
OS.indent(indent) << "EmitInteger " << Val << " VT=" << getEnumName(VT)
<< '\n';
diff --git a/llvm/utils/TableGen/DAGISelMatcher.h b/llvm/utils/TableGen/DAGISelMatcher.h
index 9c45a3a0de7..24932e64cb4 100644
--- a/llvm/utils/TableGen/DAGISelMatcher.h
+++ b/llvm/utils/TableGen/DAGISelMatcher.h
@@ -71,6 +71,8 @@ public:
CheckComplexPat,
CheckAndImm,
CheckOrImm,
+ CheckImmAllOnesV,
+ CheckImmAllZerosV,
CheckFoldableChainNode,
// Node creation/emisssion.
@@ -126,6 +128,8 @@ public:
case CheckValueType:
case CheckAndImm:
case CheckOrImm:
+ case CheckImmAllOnesV:
+ case CheckImmAllZerosV:
case CheckFoldableChainNode:
return true;
}
@@ -753,6 +757,36 @@ private:
}
};
+/// CheckImmAllOnesVMatcher - This check if the current node is an build vector
+/// of all ones.
+class CheckImmAllOnesVMatcher : public Matcher {
+public:
+ CheckImmAllOnesVMatcher() : Matcher(CheckImmAllOnesV) {}
+
+ static bool classof(const Matcher *N) {
+ return N->getKind() == CheckImmAllOnesV;
+ }
+
+private:
+ void printImpl(raw_ostream &OS, unsigned indent) const override;
+ bool isEqualImpl(const Matcher *M) const override { return true; }
+};
+
+/// CheckImmAllZerosVMatcher - This check if the current node is an build vector
+/// of all zeros.
+class CheckImmAllZerosVMatcher : public Matcher {
+public:
+ CheckImmAllZerosVMatcher() : Matcher(CheckImmAllZerosV) {}
+
+ static bool classof(const Matcher *N) {
+ return N->getKind() == CheckImmAllZerosV;
+ }
+
+private:
+ void printImpl(raw_ostream &OS, unsigned indent) const override;
+ bool isEqualImpl(const Matcher *M) const override { return true; }
+};
+
/// CheckFoldableChainNodeMatcher - This checks to see if the current node
/// (which defines a chain operand) is safe to fold into a larger pattern.
class CheckFoldableChainNodeMatcher : public Matcher {
diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index 16daeb52065..cecbc6cccdf 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -601,6 +601,14 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
OS << "OPC_CheckFoldableChainNode,\n";
return 1;
+ case Matcher::CheckImmAllOnesV:
+ OS << "OPC_CheckImmAllOnesV,\n";
+ return 1;
+
+ case Matcher::CheckImmAllZerosV:
+ OS << "OPC_CheckImmAllZerosV,\n";
+ return 1;
+
case Matcher::EmitInteger: {
int64_t Val = cast<EmitIntegerMatcher>(N)->getValue();
OS << "OPC_EmitInteger, "
@@ -1007,6 +1015,8 @@ static StringRef getOpcodeString(Matcher::KindTy Kind) {
case Matcher::CheckOrImm: return "OPC_CheckOrImm"; break;
case Matcher::CheckFoldableChainNode:
return "OPC_CheckFoldableChainNode"; break;
+ case Matcher::CheckImmAllOnesV: return "OPC_CheckImmAllOnesV"; break;
+ case Matcher::CheckImmAllZerosV: return "OPC_CheckImmAllZerosV"; break;
case Matcher::EmitInteger: return "OPC_EmitInteger"; break;
case Matcher::EmitStringInteger: return "OPC_EmitStringInteger"; break;
case Matcher::EmitRegister: return "OPC_EmitRegister"; break;
diff --git a/llvm/utils/TableGen/DAGISelMatcherGen.cpp b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
index 1a0490507de..b2285befad3 100644
--- a/llvm/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
@@ -277,6 +277,27 @@ void MatcherGen::EmitLeafMatchCode(const TreePatternNode *N) {
return;
}
+ if (LeafRec->getName() == "immAllOnesV") {
+ // If this is the root of the dag we're matching, we emit a redundant opcode
+ // check to ensure that this gets folded into the normal top-level
+ // OpcodeSwitch.
+ if (N == Pattern.getSrcPattern()) {
+ const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("build_vector"));
+ AddMatcher(new CheckOpcodeMatcher(NI));
+ }
+ return AddMatcher(new CheckImmAllOnesVMatcher());
+ }
+ if (LeafRec->getName() == "immAllZerosV") {
+ // If this is the root of the dag we're matching, we emit a redundant opcode
+ // check to ensure that this gets folded into the normal top-level
+ // OpcodeSwitch.
+ if (N == Pattern.getSrcPattern()) {
+ const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("build_vector"));
+ AddMatcher(new CheckOpcodeMatcher(NI));
+ }
+ return AddMatcher(new CheckImmAllZerosVMatcher());
+ }
+
errs() << "Unknown leaf kind: " << *N << "\n";
abort();
}
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