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authorHao Liu <Hao.Liu@arm.com>2014-02-13 05:42:33 +0000
committerHao Liu <Hao.Liu@arm.com>2014-02-13 05:42:33 +0000
commit7b6dfcf06ad1eb151f8f28df724ce5f2b06bb967 (patch)
treeee3f2c774907e9797200f68f9ccfa3aaab7d7338 /llvm/utils/TableGen/X86DisassemblerTables.cpp
parentaadd52e5cc8776ed65c0850876a68a1f10a92f10 (diff)
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[AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types.
As this problems are similar to shl/sra/srl, also add patterns for shift nodes. llvm-svn: 201298
Diffstat (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp')
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