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| author | Zachary Turner <zturner@google.com> | 2017-05-29 01:48:53 +0000 |
|---|---|---|
| committer | Zachary Turner <zturner@google.com> | 2017-05-29 01:48:53 +0000 |
| commit | 5b199be769ae68a6944a1293ead7c4ddca25f109 (patch) | |
| tree | 8b9a02fbf78125e3426b4dfb9262738bd1462378 /llvm/utils/TableGen/TableGen.cpp | |
| parent | 229c9c115997141ad95632a0bf512eb68b86bd56 (diff) | |
| download | bcm5719-llvm-5b199be769ae68a6944a1293ead7c4ddca25f109.tar.gz bcm5719-llvm-5b199be769ae68a6944a1293ead7c4ddca25f109.zip | |
Revert "[X86] Adding new LLVM TableGen backend that generates the X86 backend memory folding tables."
This reverts commit 28cb1003507f287726f43c771024a1dc102c45fe as well
as all subsequent followups. llvm-tblgen currently segfaults with
this change, and it seems it has been broken on the bots all
day with no fixes in preparation. See, for example:
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/
llvm-svn: 304121
Diffstat (limited to 'llvm/utils/TableGen/TableGen.cpp')
| -rw-r--r-- | llvm/utils/TableGen/TableGen.cpp | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp index 329ce348727..00d20f1df6c 100644 --- a/llvm/utils/TableGen/TableGen.cpp +++ b/llvm/utils/TableGen/TableGen.cpp @@ -46,7 +46,6 @@ enum ActionType { GenAttributes, GenSearchableTables, GenGlobalISel, - GenX86FoldTables, GenX86EVEX2VEXTables, GenRegisterBank, }; @@ -98,8 +97,6 @@ namespace { "Generate generic binary-searchable table"), clEnumValN(GenGlobalISel, "gen-global-isel", "Generate GlobalISel selector"), - clEnumValN(GenX86FoldTables, "gen-x86-fold-tables", - "Generate X86 fold tables"), clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables", "Generate X86 EVEX to VEX compress tables"), clEnumValN(GenRegisterBank, "gen-register-bank", @@ -193,9 +190,6 @@ bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { case GenGlobalISel: EmitGlobalISel(Records, OS); break; - case GenX86FoldTables: - EmitX86FoldTables(Records, OS); - break; case GenRegisterBank: EmitRegisterBank(Records, OS); break; |
