Allow multiclass def names to contain "#NAME"" where TableGen replaces

#NAME# with the name of the defm instantiating the multiclass.  This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA.  For example:

multiclass SSE_AVX_Inst<...> {
   def SS : Instr<...>;
   def SD : Instr<...>;
   def PS : Instr<...>;
   def PD : Instr<...>;

   def V#NAME#SS : Instr<...>;
   def V#NAME#SD : Instr<...>;
   def V#NAME#PS : Instr<...>;
   def V#NAME#PD : Instr<...>;
}

defm ADD : SSE_AVX_Inst<...>;

Results in 

ADDSS
ADDSD
ADDPS
ADDPD

VADDSS
VADDSD
VADDPS
VADDPD

llvm-svn: 70979

1 files changed, 12 insertions, 3 deletions

diff --git a/llvm/utils/TableGen/TGParser.cpp b/llvm/utils/TableGen/TGParser.cpp
index 2e2ec3118b0..ba181533c11 100644
--- a/llvm/utils/TableGen/TGParser.cpp
+++ b/llvm/utils/TableGen/TGParser.cpp
@@ -1609,9 +1609,18 @@ bool TGParser::ParseDefm() {
     for (unsigned i = 0, e = MC->DefPrototypes.size(); i != e; ++i) {
       Record *DefProto = MC->DefPrototypes[i];
 
-      // Add the suffix to the defm name to get the new name.
-      Record *CurRec = new Record(DefmPrefix + DefProto->getName(),
-                                  DefmPrefixLoc);
+      // Add in the defm name
+      std::string DefName = DefProto->getName();
+      std::string::size_type idx = DefName.find("#NAME#");
+      if (idx != std::string::npos) {
+        DefName.replace(idx, 6, DefmPrefix);
+      }
+      else {
+        // Add the suffix to the defm name to get the new name.
+        DefName = DefmPrefix + DefName;
+      }
+
+      Record *CurRec = new Record(DefName, DefmPrefixLoc);
 
       SubClassReference Ref;
       Ref.RefLoc = DefmPrefixLoc;