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authorDaniel Sanders <daniel_l_sanders@apple.com>2019-02-12 17:36:57 +0000
committerDaniel Sanders <daniel_l_sanders@apple.com>2019-02-12 17:36:57 +0000
commitdff673bb525040f93bd928e114b1dae15df0681c (patch)
treeb0e288b08a033951f110662d7e846471f2945fea /llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
parent0e71e73faacf2a061f27654e59c22586adff51b8 (diff)
downloadbcm5719-llvm-dff673bb525040f93bd928e114b1dae15df0681c.tar.gz
bcm5719-llvm-dff673bb525040f93bd928e114b1dae15df0681c.zip
[tablegen] Add locations to many PrintFatalError() calls
Summary: While working on the GISel Combiner, I noticed I was producing location-less error messages fairly often and set about fixing this. In the process, I noticed quite a few places elsewhere in TableGen that also neglected to include a relevant location. This patch adds locations to errors that relate to a specific record (or a field within it) and also have easy access to the relevant location. This is particularly useful when multiclasses are involved as many of these errors refer to the full name of a record and it's difficult to guess which substring is grep-able. Unfortunately, tablegen currently only supports Record granularity so it's not currently possible to point at a specific Init so these sometimes point at the record that caused the error rather than the precise origin of the error. Reviewers: bogner, aditya_nandakumar, volkan, aemerson, paquette, nhaehnle Reviewed By: nhaehnle Subscribers: jdoerfert, nhaehnle, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58077 llvm-svn: 353862
Diffstat (limited to 'llvm/utils/TableGen/RISCVCompressInstEmitter.cpp')
-rw-r--r--llvm/utils/TableGen/RISCVCompressInstEmitter.cpp18
1 files changed, 11 insertions, 7 deletions
diff --git a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
index 87c825b3422..f95b3bf9cb4 100644
--- a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
@@ -252,12 +252,14 @@ static bool verifyDagOpCount(CodeGenInstruction &Inst, DagInit *Dag,
// Source instructions are non compressed instructions and don't have tied
// operands.
if (IsSource)
- PrintFatalError("Input operands for Inst '" + Inst.TheDef->getName() +
- "' and input Dag operand count mismatch");
+ PrintFatalError(Inst.TheDef->getLoc(),
+ "Input operands for Inst '" + Inst.TheDef->getName() +
+ "' and input Dag operand count mismatch");
// The Dag can't have more arguments than the Instruction.
if (Dag->getNumArgs() > Inst.Operands.size())
- PrintFatalError("Inst '" + Inst.TheDef->getName() +
- "' and Dag operand count mismatch");
+ PrintFatalError(Inst.TheDef->getLoc(),
+ "Inst '" + Inst.TheDef->getName() +
+ "' and Dag operand count mismatch");
// The Instruction might have tied operands so the Dag might have
// a fewer operand count.
@@ -267,8 +269,9 @@ static bool verifyDagOpCount(CodeGenInstruction &Inst, DagInit *Dag,
--RealCount;
if (Dag->getNumArgs() != RealCount)
- PrintFatalError("Inst '" + Inst.TheDef->getName() +
- "' and Dag operand count mismatch");
+ PrintFatalError(Inst.TheDef->getLoc(),
+ "Inst '" + Inst.TheDef->getName() +
+ "' and Dag operand count mismatch");
return true;
}
@@ -529,7 +532,8 @@ void RISCVCompressInstEmitter::emitCompressInstEmitter(raw_ostream &o,
bool Compress) {
Record *AsmWriter = Target.getAsmWriter();
if (!AsmWriter->getValueAsInt("PassSubtarget"))
- PrintFatalError("'PassSubtarget' is false. SubTargetInfo object is needed "
+ PrintFatalError(AsmWriter->getLoc(),
+ "'PassSubtarget' is false. SubTargetInfo object is needed "
"for target features.\n");
std::string Namespace = Target.getName();
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