summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
diff options
context:
space:
mode:
authorMichael Liao <michael.hliao@gmail.com>2019-08-10 16:15:06 +0000
committerMichael Liao <michael.hliao@gmail.com>2019-08-10 16:15:06 +0000
commit8a25eabd42780616954f10e135effbd95edec847 (patch)
treedebe7a02e0916212823bf8c67424032815bbef5b /llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
parent21c15ef38487ee91eea898dbe80bfc5f8d6c5252 (diff)
downloadbcm5719-llvm-8a25eabd42780616954f10e135effbd95edec847.tar.gz
bcm5719-llvm-8a25eabd42780616954f10e135effbd95edec847.zip
[TableGen] Correct the shift to the proper bit width.
- Replace the previous 32-bit shift with 64-bit one matching `OpInit`. llvm-svn: 368513
Diffstat (limited to 'llvm/utils/TableGen/FixedLenDecoderEmitter.cpp')
-rw-r--r--llvm/utils/TableGen/FixedLenDecoderEmitter.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
index 7a6f44b9ab6..cfe06dd4d7f 100644
--- a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -2038,7 +2038,7 @@ populateInstruction(CodeGenTarget &Target, const Record &EncodingDef,
for (unsigned I = 0; I < OpBits->getNumBits(); ++I)
if (const BitInit *OpBit = dyn_cast<BitInit>(OpBits->getBit(I)))
if (OpBit->getValue())
- OpInfo.InitValue |= 1 << I;
+ OpInfo.InitValue |= 1ULL << I;
unsigned Base = ~0U;
unsigned Width = 0;
OpenPOWER on IntegriCloud