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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-15 00:20:40 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-15 00:20:40 +0000 |
| commit | 22ea424d4312ef1984ae7da16962ac573d0b6378 (patch) | |
| tree | caa2b6a036474a0597040ca967a82b722cd6603a /llvm/utils/TableGen/FastISelEmitter.cpp | |
| parent | e9e6705cf90a9322ac88d377fe63f902b6a6bc40 (diff) | |
| download | bcm5719-llvm-22ea424d4312ef1984ae7da16962ac573d0b6378.tar.gz bcm5719-llvm-22ea424d4312ef1984ae7da16962ac573d0b6378.zip | |
Move the list of register classes into CodeGenRegBank as well.
No functional change intended.
llvm-svn: 133029
Diffstat (limited to 'llvm/utils/TableGen/FastISelEmitter.cpp')
| -rw-r--r-- | llvm/utils/TableGen/FastISelEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp index 78ac556bd13..6c2a76734c5 100644 --- a/llvm/utils/TableGen/FastISelEmitter.cpp +++ b/llvm/utils/TableGen/FastISelEmitter.cpp @@ -250,7 +250,7 @@ struct OperandsSignature { if (OpLeafRec->isSubClassOf("RegisterClass")) RC = &Target.getRegisterClass(OpLeafRec); else if (OpLeafRec->isSubClassOf("Register")) - RC = Target.getRegisterClassForRegister(OpLeafRec); + RC = Target.getRegBank().getRegClassForRegister(OpLeafRec); else return false; |
