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authorAnshuman Dasgupta <adasgupt@codeaurora.org>2011-12-01 21:10:21 +0000
committerAnshuman Dasgupta <adasgupt@codeaurora.org>2011-12-01 21:10:21 +0000
commit08ebdc1e716a9aa29af44e3efee290d0bccb0481 (patch)
treefca570a5f01bac3e4e552ae75c24dddba36cb33e /llvm/utils/TableGen/DFAPacketizerEmitter.h
parente0a64f7302fc115c19b4df46ad5b5cb72ffd5a15 (diff)
downloadbcm5719-llvm-08ebdc1e716a9aa29af44e3efee290d0bccb0481.tar.gz
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Add a deterministic finite automaton based packetizer for VLIW architectures
llvm-svn: 145629
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diff --git a/llvm/utils/TableGen/DFAPacketizerEmitter.h b/llvm/utils/TableGen/DFAPacketizerEmitter.h
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+//===- DFAPacketizerEmitter.h - Packetization DFA for a VLIW machine-------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This class parses the Schedule.td file and produces an API that can be used
+// to reason about whether an instruction can be added to a packet on a VLIW
+// architecture. The class internally generates a deterministic finite
+// automaton (DFA) that models all possible mappings of machine instructions
+// to functional units as instructions are added to a packet.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/ADT/DenseSet.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/TableGen/TableGenBackend.h"
+#include <map>
+#include <string>
+
+namespace llvm {
+//
+// class DFAGen: class that generates and prints out the DFA for resource
+// tracking
+//
+class DFAGen : public TableGenBackend {
+private:
+ std::string TargetName;
+ //
+ // allInsnClasses is the set of all possible resources consumed by an
+ // InstrStage
+ //
+ DenseSet<unsigned> allInsnClasses;
+ RecordKeeper &Records;
+
+public:
+ DFAGen(RecordKeeper& R);
+
+ //
+ // collectAllInsnClasses: Populate allInsnClasses which is a set of units
+ // used in each stage.
+ //
+ void collectAllInsnClasses(const std::string &Name,
+ Record *ItinData,
+ unsigned &NStages,
+ raw_ostream &OS);
+
+ void run(raw_ostream &OS);
+};
+}
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