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authorCraig Topper <craig.topper@gmail.com>2013-10-05 05:38:16 +0000
committerCraig Topper <craig.topper@gmail.com>2013-10-05 05:38:16 +0000
commita1bbc323fadc0088bf18a6d3fdafa415b711aade (patch)
tree377af184270da549b2877ca2fc29d84f9f5197dd /llvm/utils/TableGen/DAGISelMatcher.cpp
parentaff49df0fe04cdbdfef58c22acafead573acf059 (diff)
downloadbcm5719-llvm-a1bbc323fadc0088bf18a6d3fdafa415b711aade.tar.gz
bcm5719-llvm-a1bbc323fadc0088bf18a6d3fdafa415b711aade.zip
Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
llvm-svn: 192026
Diffstat (limited to 'llvm/utils/TableGen/DAGISelMatcher.cpp')
-rw-r--r--llvm/utils/TableGen/DAGISelMatcher.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/DAGISelMatcher.cpp b/llvm/utils/TableGen/DAGISelMatcher.cpp
index af0eb977250..5d6a11ae0dc 100644
--- a/llvm/utils/TableGen/DAGISelMatcher.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcher.cpp
@@ -134,6 +134,10 @@ void CheckSameMatcher::printImpl(raw_ostream &OS, unsigned indent) const {
OS.indent(indent) << "CheckSame " << MatchNumber << '\n';
}
+void CheckChildSameMatcher::printImpl(raw_ostream &OS, unsigned indent) const {
+ OS.indent(indent) << "CheckChild" << ChildNo << "Same\n";
+}
+
void CheckPatternPredicateMatcher::
printImpl(raw_ostream &OS, unsigned indent) const {
OS.indent(indent) << "CheckPatternPredicate " << Predicate << '\n';
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