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| author | Sander de Smalen <sander.desmalen@arm.com> | 2018-04-26 12:54:42 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2018-04-26 12:54:42 +0000 |
| commit | fe17a78b86d3cf1218a605601e15673f501d4f2b (patch) | |
| tree | 271944b9bb7b837e9c711332ef82c925b471bd0f /llvm/utils/TableGen/CodeGenSchedule.cpp | |
| parent | bd896472296edcff008f1e90c7926fc440b333ff (diff) | |
| download | bcm5719-llvm-fe17a78b86d3cf1218a605601e15673f501d4f2b.tar.gz bcm5719-llvm-fe17a78b86d3cf1218a605601e15673f501d4f2b.zip | |
[AArch64][SVE] Enable DiagnosticPredicates for SVE LD1 instructions.
This patch extends the PredicateMethod of AsmOperands used in SVE's
LD1 instructions with a DiagnosticPredicate. This makes them 'context
sensitive' to the operand that has been parsed and tells the user to
use the right register (with expected shift/extend), rather than telling
the immediate is out of range when it actually parsed a register.
Patch [2/2] in a series to improve assembler diagnostics for SVE:
- Patch [1/2]: https://reviews.llvm.org/D45879
- Patch [2/2]: https://reviews.llvm.org/D45880
Reviewers: olista01, stoklund, craig.topper, mcrosier, rengolin, echristo, fhahn, SjoerdMeijer, evandro, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D45880
llvm-svn: 330934
Diffstat (limited to 'llvm/utils/TableGen/CodeGenSchedule.cpp')
0 files changed, 0 insertions, 0 deletions
