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authorCraig Topper <craig.topper@gmail.com>2013-07-14 04:42:23 +0000
committerCraig Topper <craig.topper@gmail.com>2013-07-14 04:42:23 +0000
commitb94011fd28ff346162c07a616466e8f966f03297 (patch)
treeb02bd1d36b500796e19d92fbd0b1d74991939ab1 /llvm/utils/TableGen/CodeGenSchedule.cpp
parentaa8ceba833e0246b753d91747099052c170a08d2 (diff)
downloadbcm5719-llvm-b94011fd28ff346162c07a616466e8f966f03297.tar.gz
bcm5719-llvm-b94011fd28ff346162c07a616466e8f966f03297.zip
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
llvm-svn: 186274
Diffstat (limited to 'llvm/utils/TableGen/CodeGenSchedule.cpp')
-rw-r--r--llvm/utils/TableGen/CodeGenSchedule.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp
index 85eee5fde93..001e97d1e11 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -1102,7 +1102,7 @@ void PredTransitions::getIntersectingVariants(
TransVariant &Variant = Variants[VIdx];
// Don't expand variants if the processor models don't intersect.
// A zero processor index means any processor.
- SmallVector<unsigned, 4> &ProcIndices = TransVec[TransIdx].ProcIndices;
+ SmallVectorImpl<unsigned> &ProcIndices = TransVec[TransIdx].ProcIndices;
if (ProcIndices[0] && Variants[VIdx].ProcIdx) {
unsigned Cnt = std::count(ProcIndices.begin(), ProcIndices.end(),
Variant.ProcIdx);
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