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authorAlex Bradbury <asb@lowrisc.org>2018-04-26 12:13:48 +0000
committerAlex Bradbury <asb@lowrisc.org>2018-04-26 12:13:48 +0000
commit09926296df468143fd960d54ac376194b442547c (patch)
tree9e94f8e6050e89e7e51a371c5895b2dc890c1647 /llvm/utils/TableGen/CodeGenSchedule.cpp
parentfd2bc11248f76b2131a1630761ea43ce01ec010d (diff)
downloadbcm5719-llvm-09926296df468143fd960d54ac376194b442547c.tar.gz
bcm5719-llvm-09926296df468143fd960d54ac376194b442547c.zip
[RISCV] Implement isLegalAddressingMode for RISC-V
This has no impact on codegen for the current RISC-V unit tests or my small benchmark set and very minor changes in a few programs in the GCC torture suite. Based on this, I haven't been able to produce a representative test program that demonstrates a benefit from isLegalAddressingMode. I'm committing the patch anyway, on the basis that presenting accurate information to the target-independent code is preferable to relying on incorrect generic assumptions. llvm-svn: 330932
Diffstat (limited to 'llvm/utils/TableGen/CodeGenSchedule.cpp')
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