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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 03:08:20 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 03:08:20 +0000 |
| commit | d53674aaf15d65413ede6beb52c126e8c109b028 (patch) | |
| tree | af5ae395c6cc5e2574efcd38fd5f939b1d1bccc3 /llvm/utils/TableGen/CodeGenRegisters.h | |
| parent | b68fee1e82c44c338a75233c7452eb324e25c6b7 (diff) | |
| download | bcm5719-llvm-d53674aaf15d65413ede6beb52c126e8c109b028.tar.gz bcm5719-llvm-d53674aaf15d65413ede6beb52c126e8c109b028.zip | |
Remove MethodProtos/MethodBodies and allocation_order_begin/end.
Targets that need to change the default allocation order should use the
AltOrders mechanism instead. See the X86 and ARM targets for examples.
The allocation_order_begin() and allocation_order_end() methods have been
replaced with getRawAllocationOrder(), and there is further support
functions in RegisterClassInfo.
It is no longer possible to insert arbitrary code into generated
register classes. This is a feature.
llvm-svn: 133332
Diffstat (limited to 'llvm/utils/TableGen/CodeGenRegisters.h')
| -rw-r--r-- | llvm/utils/TableGen/CodeGenRegisters.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.h b/llvm/utils/TableGen/CodeGenRegisters.h index 5e3d5e59c11..5260a144271 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.h +++ b/llvm/utils/TableGen/CodeGenRegisters.h @@ -97,7 +97,7 @@ namespace llvm { bool Allocatable; // Map SubRegIndex -> RegisterClass DenseMap<Record*,Record*> SubRegClasses; - std::string MethodProtos, MethodBodies, AltOrderSelect; + std::string AltOrderSelect; const std::string &getName() const; const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;} |

