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authorJim Grosbach <grosbach@apple.com>2011-03-11 01:19:05 +0000
committerJim Grosbach <grosbach@apple.com>2011-03-11 01:19:05 +0000
commitb1ac770fa3c34402d7154da8cadf357154215010 (patch)
tree621742b45764838e5496a744c77e61a04623a0af /llvm/utils/TableGen/CodeGenRegisters.h
parentd0fc231e13402cc0c2d8938fa213b6b631e70f27 (diff)
downloadbcm5719-llvm-b1ac770fa3c34402d7154da8cadf357154215010.tar.gz
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Trailing whitespace.
llvm-svn: 127446
Diffstat (limited to 'llvm/utils/TableGen/CodeGenRegisters.h')
-rw-r--r--llvm/utils/TableGen/CodeGenRegisters.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.h b/llvm/utils/TableGen/CodeGenRegisters.h
index bbd0cefa580..7f45b6ffe02 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.h
+++ b/llvm/utils/TableGen/CodeGenRegisters.h
@@ -49,23 +49,23 @@ namespace llvm {
const std::string &getName() const;
const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;}
unsigned getNumValueTypes() const { return VTs.size(); }
-
+
MVT::SimpleValueType getValueTypeNum(unsigned VTNum) const {
if (VTNum < VTs.size())
return VTs[VTNum];
assert(0 && "VTNum greater than number of ValueTypes in RegClass!");
abort();
}
-
+
bool containsRegister(Record *R) const {
for (unsigned i = 0, e = Elements.size(); i != e; ++i)
if (Elements[i] == R) return true;
return false;
}
-
+
// Returns true if RC is a strict subclass.
// RC is a sub-class of this class if it is a valid replacement for any
- // instruction operand where a register of this classis required. It must
+ // instruction operand where a register of this classis required. It must
// satisfy these conditions:
//
// 1. All RC registers are also in this.
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