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authorChris Lattner <sabre@nondot.org>2010-11-06 19:57:21 +0000
committerChris Lattner <sabre@nondot.org>2010-11-06 19:57:21 +0000
commit4869d346e3c50fd7182c275a21169722161d541c (patch)
tree34aa070844a2506f1207b3c23bc7af174519095d /llvm/utils/TableGen/CodeGenRegisters.h
parent7cef447c14472adadfd4dc4915df591aeef0511f (diff)
downloadbcm5719-llvm-4869d346e3c50fd7182c275a21169722161d541c.tar.gz
bcm5719-llvm-4869d346e3c50fd7182c275a21169722161d541c.zip
add (and document) the ability for alias results to have
fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). llvm-svn: 118352
Diffstat (limited to 'llvm/utils/TableGen/CodeGenRegisters.h')
-rw-r--r--llvm/utils/TableGen/CodeGenRegisters.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.h b/llvm/utils/TableGen/CodeGenRegisters.h
index ccd3d222bba..bbd0cefa580 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.h
+++ b/llvm/utils/TableGen/CodeGenRegisters.h
@@ -57,6 +57,12 @@ namespace llvm {
abort();
}
+ bool containsRegister(Record *R) const {
+ for (unsigned i = 0, e = Elements.size(); i != e; ++i)
+ if (Elements[i] == R) return true;
+ return false;
+ }
+
// Returns true if RC is a strict subclass.
// RC is a sub-class of this class if it is a valid replacement for any
// instruction operand where a register of this classis required. It must
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