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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-15 00:50:23 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-15 00:50:23 +0000
commit095f22af7f7106f86444e230b73a5e64fa2fae00 (patch)
treea3bd74af694d2d58848cc0222142c281c6317eb6 /llvm/utils/TableGen/CodeGenRegisters.cpp
parent8b5c0e4af2e5f1d30a09b6855abbb888c913fdd7 (diff)
downloadbcm5719-llvm-095f22af7f7106f86444e230b73a5e64fa2fae00.tar.gz
bcm5719-llvm-095f22af7f7106f86444e230b73a5e64fa2fae00.zip
Create a struct representing register units in TableGen.
Besides the weight, we also want to store up to two root registers per unit. Most units will have a single root, the leaf register they represent. Units created for ad hoc aliasing get two roots: The two aliasing registers. The root registers can be used to compute the set of overlapping registers. llvm-svn: 156792
Diffstat (limited to 'llvm/utils/TableGen/CodeGenRegisters.cpp')
-rw-r--r--llvm/utils/TableGen/CodeGenRegisters.cpp24
1 files changed, 6 insertions, 18 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 1a22dc24f2b..98d39f7a89e 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -187,15 +187,9 @@ bool CodeGenRegister::inheritRegUnits(CodeGenRegBank &RegBank) {
for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
I != E; ++I) {
// Strangely a register may have itself as a subreg (self-cycle) e.g. XMM.
- // Only create a unit if no other subregs have units.
CodeGenRegister *SR = I->second;
- if (SR == this) {
- // RegUnits are only empty during computeSubRegs, prior to computing
- // weight.
- if (RegUnits.empty())
- RegUnits.push_back(RegBank.newRegUnit(0));
+ if (SR == this)
continue;
- }
// Merge the subregister's units into this register's RegUnits.
mergeRegUnits(RegUnits, SR->RegUnits);
}
@@ -392,7 +386,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
continue;
// Create a RegUnit representing this alias edge, and add it to both
// registers.
- unsigned Unit = RegBank.newRegUnit(0);
+ unsigned Unit = RegBank.newRegUnit(this, AR);
RegUnits.push_back(Unit);
AR->RegUnits.push_back(Unit);
}
@@ -401,7 +395,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
// a leaf register with ad hoc aliases doesn't get its own unit - it isn't
// necessary. This means the aliasing leaf registers can share a single unit.
if (RegUnits.empty())
- RegUnits.push_back(RegBank.newRegUnit(0));
+ RegUnits.push_back(RegBank.newRegUnit(this));
return SubRegs;
}
@@ -540,7 +534,7 @@ unsigned CodeGenRegister::getWeight(const CodeGenRegBank &RegBank) const {
unsigned Weight = 0;
for (RegUnitList::const_iterator I = RegUnits.begin(), E = RegUnits.end();
I != E; ++I) {
- Weight += RegBank.getRegUnitWeight(*I);
+ Weight += RegBank.getRegUnit(*I).Weight;
}
return Weight;
}
@@ -958,7 +952,6 @@ CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) : Records(Records) {
// Precompute all sub-register maps.
// This will create Composite entries for all inferred sub-register indices.
- NumRegUnits = 0;
for (unsigned i = 0, e = Registers.size(); i != e; ++i)
Registers[i]->computeSubRegs(*this);
@@ -974,7 +967,7 @@ CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) : Records(Records) {
// Native register units are associated with a leaf register. They've all been
// discovered now.
- NumNativeRegUnits = NumRegUnits;
+ NumNativeRegUnits = RegUnits.size();
// Read in register class definitions.
std::vector<Record*> RCs = Records.getAllDerivedDefinitions("RegisterClass");
@@ -1243,7 +1236,7 @@ static void computeUberWeights(std::vector<UberRegSet> &UberSets,
Reg = UnitI.getReg();
Weight = 0;
}
- unsigned UWeight = RegBank.getRegUnitWeight(*UnitI);
+ unsigned UWeight = RegBank.getRegUnit(*UnitI).Weight;
if (!UWeight) {
UWeight = 1;
RegBank.increaseRegUnitWeight(*UnitI, UWeight);
@@ -1338,11 +1331,6 @@ static bool normalizeWeight(CodeGenRegister *Reg,
// The goal is that two registers in the same class will have the same weight,
// where each register's weight is defined as sum of its units' weights.
void CodeGenRegBank::computeRegUnitWeights() {
- assert(RegUnitWeights.empty() && "Only initialize RegUnitWeights once");
-
- // Only allocatable units will be initialized to nonzero weight.
- RegUnitWeights.resize(NumRegUnits);
-
std::vector<UberRegSet> UberSets;
std::vector<UberRegSet*> RegSets(Registers.size());
computeUberSets(UberSets, RegSets, *this);
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