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authorTim Northover <tnorthover@apple.com>2014-05-15 11:16:32 +0000
committerTim Northover <tnorthover@apple.com>2014-05-15 11:16:32 +0000
commitd8d65a69cfb608724e071048350b9616228dfe34 (patch)
tree009f769115178cfbebd034aa7481523152978316 /llvm/utils/TableGen/CodeGenInstruction.h
parentdd8fca513682f6899d36b7161e48659fa216bba2 (diff)
downloadbcm5719-llvm-d8d65a69cfb608724e071048350b9616228dfe34.tar.gz
bcm5719-llvm-d8d65a69cfb608724e071048350b9616228dfe34.zip
TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its commit, I've enabled the AArch64 & ARM64 NEON mov aliases. llvm-svn: 208867
Diffstat (limited to 'llvm/utils/TableGen/CodeGenInstruction.h')
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index dc39eb973b9..818d0e1d36d 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -336,7 +336,7 @@ namespace llvm {
/// of them are matched by the operand, the second value should be -1.
std::vector<std::pair<unsigned, int> > ResultInstOperandIndex;
- CodeGenInstAlias(Record *R, CodeGenTarget &T);
+ CodeGenInstAlias(Record *R, unsigned Variant, CodeGenTarget &T);
bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
Record *InstOpRec, bool hasSubOps, ArrayRef<SMLoc> Loc,
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