summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/CodeGenInstruction.h
diff options
context:
space:
mode:
authorPetar Jovanovic <petar.jovanovic@mips.com>2018-05-23 15:28:28 +0000
committerPetar Jovanovic <petar.jovanovic@mips.com>2018-05-23 15:28:28 +0000
commitc051000b838a6c30e7efa6111dc3867c844ec027 (patch)
tree0cece070468a54a3caf0cb033af4b7c375832878 /llvm/utils/TableGen/CodeGenInstruction.h
parentba917bf053dffc91bc14616637e6fd4d2b08e2c7 (diff)
downloadbcm5719-llvm-c051000b838a6c30e7efa6111dc3867c844ec027.tar.gz
bcm5719-llvm-c051000b838a6c30e7efa6111dc3867c844ec027.zip
[X86][MIPS][ARM] New machine instruction property 'isMoveReg'
This property is needed in order to follow values movement between registers. This property is used in TII to implement method that returns true if simple copy like instruction is recognized, along with source and destination machine operands. Patch by Nikola Prica. Differential Revision: https://reviews.llvm.org/D45204 llvm-svn: 333093
Diffstat (limited to 'llvm/utils/TableGen/CodeGenInstruction.h')
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index d0e7fea40b3..4cf462d41f9 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -226,6 +226,7 @@ template <typename T> class ArrayRef;
bool isIndirectBranch : 1;
bool isCompare : 1;
bool isMoveImm : 1;
+ bool isMoveReg : 1;
bool isBitcast : 1;
bool isSelect : 1;
bool isBarrier : 1;
OpenPOWER on IntegriCloud