summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/CodeGenInstruction.cpp
diff options
context:
space:
mode:
authorTim Northover <tnorthover@apple.com>2014-05-15 11:16:19 +0000
committerTim Northover <tnorthover@apple.com>2014-05-15 11:16:19 +0000
commitdd8fca513682f6899d36b7161e48659fa216bba2 (patch)
treeb56b04f0b23d86964740abf14dae4fbb3890eb73 /llvm/utils/TableGen/CodeGenInstruction.cpp
parentdd2d84a223116f2ace36cbc513c04df161d7653b (diff)
downloadbcm5719-llvm-dd8fca513682f6899d36b7161e48659fa216bba2.tar.gz
bcm5719-llvm-dd8fca513682f6899d36b7161e48659fa216bba2.zip
ARM64: add correct vector registers during asm parsing
Previously, we ignored the difference between V64 and V128 when parsing assembly: they both got mapped to registers in the FPR128 class. This is basically harmless at the moment because they both print and encode the same way. However, it will affect the printing of aliases. llvm-svn: 208866
Diffstat (limited to 'llvm/utils/TableGen/CodeGenInstruction.cpp')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud