summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/CodeGenInstruction.cpp
diff options
context:
space:
mode:
authorQuentin Colombet <qcolombet@apple.com>2014-08-11 22:17:14 +0000
committerQuentin Colombet <qcolombet@apple.com>2014-08-11 22:17:14 +0000
commitd533cdf26f9a602b1f45734ebbc6169faee5dcdd (patch)
tree7bc4c4e5145da4f0ab0382e5a03db7173ac4960a /llvm/utils/TableGen/CodeGenInstruction.cpp
parent35f986d3cd6942cff0fc7f78062924ebebd6988d (diff)
downloadbcm5719-llvm-d533cdf26f9a602b1f45734ebbc6169faee5dcdd.tar.gz
bcm5719-llvm-d533cdf26f9a602b1f45734ebbc6169faee5dcdd.zip
Add isRegSequence property.
This patch adds a new property: isRegSequence and the related target hooks: TargetIntrInfo::getRegSequenceInputs and TargetInstrInfo::getRegSequenceLikeInputs to specify that a target specific instruction is a (kind of) REG_SEQUENCE. <rdar://problem/12702965> llvm-svn: 215394
Diffstat (limited to 'llvm/utils/TableGen/CodeGenInstruction.cpp')
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index 1e8daf5b09b..179858d7632 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -314,6 +314,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R)
hasPostISelHook = R->getValueAsBit("hasPostISelHook");
hasCtrlDep = R->getValueAsBit("hasCtrlDep");
isNotDuplicable = R->getValueAsBit("isNotDuplicable");
+ isRegSequence = R->getValueAsBit("isRegSequence");
bool Unset;
mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset);
OpenPOWER on IntegriCloud