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author | Matthias Braun <matze@braunis.de> | 2016-03-01 20:03:11 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2016-03-01 20:03:11 +0000 |
commit | 8e0a734fc5ee45e2dc8926c58b6ed68fd57500ea (patch) | |
tree | b129d4b80957c403b5c2cab96f6138e36da1fa58 /llvm/utils/TableGen/CodeGenInstruction.cpp | |
parent | 8f1b1f59213fc257c5b4169855e54a7e935d0232 (diff) | |
download | bcm5719-llvm-8e0a734fc5ee45e2dc8926c58b6ed68fd57500ea.tar.gz bcm5719-llvm-8e0a734fc5ee45e2dc8926c58b6ed68fd57500ea.zip |
TableGen: Add hasNoSchedulingInfo to instructions
This introduces a new flag that indicates that a specific instruction
will never be present when the MachineScheduler runs and therefore needs
no scheduling information.
This is in preparation for an upcoming commit which checks completeness
of a scheduling model when tablegen runs.
Differential Revision: http://reviews.llvm.org/D17728
llvm-svn: 262383
Diffstat (limited to 'llvm/utils/TableGen/CodeGenInstruction.cpp')
-rw-r--r-- | llvm/utils/TableGen/CodeGenInstruction.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp index bd26beb3567..ec802363030 100644 --- a/llvm/utils/TableGen/CodeGenInstruction.cpp +++ b/llvm/utils/TableGen/CodeGenInstruction.cpp @@ -324,6 +324,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R) isExtractSubreg = R->getValueAsBit("isExtractSubreg"); isInsertSubreg = R->getValueAsBit("isInsertSubreg"); isConvergent = R->getValueAsBit("isConvergent"); + hasNoSchedulingInfo = R->getValueAsBit("hasNoSchedulingInfo"); bool Unset; mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset); |