diff options
author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2015-03-01 08:23:41 +0000 |
---|---|---|
committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2015-03-01 08:23:41 +0000 |
commit | 0995479e67246b18c993b132c7be67f770dfed0b (patch) | |
tree | be94b861863afb30c58eac2260c04fa130d8fa44 /llvm/utils/TableGen/CodeGenInstruction.cpp | |
parent | 02ffd26023f75cd0a96072ed1444c78eb284cd0b (diff) | |
download | bcm5719-llvm-0995479e67246b18c993b132c7be67f770dfed0b.tar.gz bcm5719-llvm-0995479e67246b18c993b132c7be67f770dfed0b.zip |
Reverted 230471 - gather scatter handling in table gen.
llvm-svn: 230892
Diffstat (limited to 'llvm/utils/TableGen/CodeGenInstruction.cpp')
-rw-r--r-- | llvm/utils/TableGen/CodeGenInstruction.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp index b1e43183634..10602964e48 100644 --- a/llvm/utils/TableGen/CodeGenInstruction.cpp +++ b/llvm/utils/TableGen/CodeGenInstruction.cpp @@ -320,7 +320,6 @@ CodeGenInstruction::CodeGenInstruction(Record *R) isRegSequence = R->getValueAsBit("isRegSequence"); isExtractSubreg = R->getValueAsBit("isExtractSubreg"); isInsertSubreg = R->getValueAsBit("isInsertSubreg"); - hasTwoExplicitDefs = R->getValueAsBit("hasTwoExplicitDefs"); bool Unset; mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset); |