summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/CodeGenInstruction.cpp
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2008-01-08 18:05:21 +0000
committerChris Lattner <sabre@nondot.org>2008-01-08 18:05:21 +0000
commit07fde9bde16977909e8efcd1507da0e6c82030de (patch)
tree9f2abb0cb5890e73615492c8e322affcd1f31b74 /llvm/utils/TableGen/CodeGenInstruction.cpp
parent7e41c29a86a1c1629caf7d5519cd47898628ef6b (diff)
downloadbcm5719-llvm-07fde9bde16977909e8efcd1507da0e6c82030de.tar.gz
bcm5719-llvm-07fde9bde16977909e8efcd1507da0e6c82030de.zip
add a mayLoad property for machine instructions, a correlary to mayStore.
This is currently not set by anything. llvm-svn: 45748
Diffstat (limited to 'llvm/utils/TableGen/CodeGenInstruction.cpp')
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index daab0654a41..9778db3ccfd 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -84,6 +84,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
isBarrier = R->getValueAsBit("isBarrier");
isCall = R->getValueAsBit("isCall");
isSimpleLoad = R->getValueAsBit("isSimpleLoad");
+ mayLoad = R->getValueAsBit("mayLoad");
mayStore = R->getValueAsBit("mayStore");
isImplicitDef= R->getValueAsBit("isImplicitDef");
bool isTwoAddress = R->getValueAsBit("isTwoAddress");
OpenPOWER on IntegriCloud