summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
diff options
context:
space:
mode:
authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-08-17 15:54:07 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-08-17 15:54:07 +0000
commit45e61c5f9919e7a04bbe4de879a639147e66715d (patch)
tree8ee1c90577088906e9321395ad29e068966c4bed /llvm/utils/TableGen/CodeGenDAGPatterns.cpp
parent2ec36f08a6cce7aa6f2e0ae5a1f62a475148baf5 (diff)
downloadbcm5719-llvm-45e61c5f9919e7a04bbe4de879a639147e66715d.tar.gz
bcm5719-llvm-45e61c5f9919e7a04bbe4de879a639147e66715d.zip
[TableGen] TypeInfer - Cache the legal types as TypeSetByHwMode
We were just caching the MVT set of legal types, then every call creating a new TypeSetByHwMode with it and passing it back on the stack. There's no need to do this - we can create and cache the whole TypeSetByHwMode once and return a const reference to it each time. Additionally, TypeInfer::expandOverloads wasn't making use of the fact that the cache just contains a default mode containing all the types. Saves up to 30secs in debug builds of x86 -gen-dag-isel. Differential Revision: https://reviews.llvm.org/D50903 llvm-svn: 340042
Diffstat (limited to 'llvm/utils/TableGen/CodeGenDAGPatterns.cpp')
-rw-r--r--llvm/utils/TableGen/CodeGenDAGPatterns.cpp25
1 files changed, 10 insertions, 15 deletions
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index c9dc8a96c8c..dc88da220e8 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -740,17 +740,12 @@ bool TypeInfer::EnforceSameSize(TypeSetByHwMode &A, TypeSetByHwMode &B) {
void TypeInfer::expandOverloads(TypeSetByHwMode &VTS) {
ValidateOnExit _1(VTS, *this);
- TypeSetByHwMode Legal = getLegalTypes();
- bool HaveLegalDef = Legal.hasDefault();
+ const TypeSetByHwMode &Legal = getLegalTypes();
+ assert(Legal.isDefaultOnly() && "Default-mode only expected");
+ const TypeSetByHwMode::SetType &LegalTypes = Legal.get(DefaultMode);
- for (auto &I : VTS) {
- unsigned M = I.first;
- if (!Legal.hasMode(M) && !HaveLegalDef) {
- TP.error("Invalid mode " + Twine(M));
- return;
- }
- expandOverloads(I.second, Legal.get(M));
- }
+ for (auto &I : VTS)
+ expandOverloads(I.second, LegalTypes);
}
void TypeInfer::expandOverloads(TypeSetByHwMode::SetType &Out,
@@ -802,17 +797,17 @@ void TypeInfer::expandOverloads(TypeSetByHwMode::SetType &Out,
}
}
-TypeSetByHwMode TypeInfer::getLegalTypes() {
+const TypeSetByHwMode &TypeInfer::getLegalTypes() {
if (!LegalTypesCached) {
+ TypeSetByHwMode::SetType &LegalTypes = LegalCache.getOrCreate(DefaultMode);
// Stuff all types from all modes into the default mode.
const TypeSetByHwMode &LTS = TP.getDAGPatterns().getLegalTypes();
for (const auto &I : LTS)
- LegalCache.insert(I.second);
+ LegalTypes.insert(I.second);
LegalTypesCached = true;
}
- TypeSetByHwMode VTS;
- VTS.getOrCreate(DefaultMode) = LegalCache;
- return VTS;
+ assert(LegalCache.isDefaultOnly() && "Default-mode only expected");
+ return LegalCache;
}
#ifndef NDEBUG
OpenPOWER on IntegriCloud