[llvm-exegesis][NFC] Refactor X86 tests fixtures into a base class.

Reviewers: gchatelet, a.sidorin

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68262

llvm-svn: 373313

1 files changed, 9 insertions, 24 deletions

diff --git a/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
index 9e745461142..7e158daf734 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp
@@ -11,6 +11,7 @@
 #include <cassert>
 #include <memory>
 
+#include "TestBase.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/TargetSelect.h"
 #include "gmock/gmock.h"
@@ -23,21 +24,11 @@ namespace {
 using testing::Pair;
 using testing::UnorderedElementsAre;
 
-class SchedClassResolutionTest : public ::testing::Test {
+class SchedClassResolutionTest : public X86TestBase {
 protected:
-  SchedClassResolutionTest() {
-    const std::string TT = "x86_64-unknown-linux";
-    std::string error;
-    const llvm::Target *const TheTarget =
-        llvm::TargetRegistry::lookupTarget(TT, error);
-    if (!TheTarget) {
-      llvm::errs() << error << "\n";
-      return;
-    }
-    STI.reset(TheTarget->createMCSubtargetInfo(TT, "haswell", ""));
-
+  SchedClassResolutionTest() : STI(State.getSubtargetInfo()) {
     // Compute the ProxResIdx of ports uses in tests.
-    const auto &SM = STI->getSchedModel();
+    const auto &SM = STI.getSchedModel();
     for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
       const std::string Name = SM.getProcResource(I)->Name;
       if (Name == "HWPort0") {
@@ -62,14 +53,8 @@ protected:
     EXPECT_NE(P0156Idx, 0);
   }
 
-  static void SetUpTestCase() {
-    LLVMInitializeX86TargetInfo();
-    LLVMInitializeX86Target();
-    LLVMInitializeX86TargetMC();
-  }
-
 protected:
-  std::unique_ptr<const llvm::MCSubtargetInfo> STI;
+  const llvm::MCSubtargetInfo &STI;
   uint16_t P0Idx = 0;
   uint16_t P1Idx = 0;
   uint16_t P5Idx = 0;
@@ -80,20 +65,20 @@ protected:
 
 TEST_F(SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P0) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI->getSchedModel(), {{P0Idx, 2}});
+      computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2}});
   EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));
 }
 
 TEST_F(SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI->getSchedModel(), {{P05Idx, 2}});
+      computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P5Idx, 1.0)));
 }
 
 TEST_F(SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {
   const auto Pressure = computeIdealizedProcResPressure(
-      STI->getSchedModel(), {{P05Idx, 2}, {P0156Idx, 2}});
+      STI.getSchedModel(), {{P05Idx, 2}, {P0156Idx, 2}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
                                    Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
@@ -102,7 +87,7 @@ TEST_F(SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {
 TEST_F(SchedClassResolutionTest,
        ComputeIdealizedProcResPressure_1P1_1P05_2P0156) {
   const auto Pressure = computeIdealizedProcResPressure(
-      STI->getSchedModel(), {{P1Idx, 1}, {P05Idx, 1}, {P0156Idx, 2}});
+      STI.getSchedModel(), {{P1Idx, 1}, {P05Idx, 1}, {P0156Idx, 2}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
                                    Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));