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| author | Sander de Smalen <sander.desmalen@arm.com> | 2018-04-13 12:56:14 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2018-04-13 12:56:14 +0000 |
| commit | 5c62598b0da96ae7df1b4be69ae7f2b0ce63febc (patch) | |
| tree | db98ba1bf2496ea2afc7403f876ea871a5a487d8 /llvm/unittests/tools/llvm-exegesis/BenchmarkResultTest.cpp | |
| parent | ae0c2711b608ef053ec01f5298648c3a8d12e6d0 (diff) | |
| download | bcm5719-llvm-5c62598b0da96ae7df1b4be69ae7f2b0ce63febc.tar.gz bcm5719-llvm-5c62598b0da96ae7df1b4be69ae7f2b0ce63febc.zip | |
[AArch64][SVE] Asm: Support for contiguous ST1 (scalar+imm) store instructions.
Summary:
Added instructions for contiguous stores, ST1, with scalar+imm addressing
modes and corresponding tests. The patch also adds parsing of
'mul vl' as needed for the VL-scaled immediate.
This is patch [6/6] in a series to add assembler/disassembler support for
SVE's contiguous ST1 (scalar+imm) instructions.
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro
Reviewed By: rengolin
Subscribers: tschuett, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D45432
llvm-svn: 330014
Diffstat (limited to 'llvm/unittests/tools/llvm-exegesis/BenchmarkResultTest.cpp')
0 files changed, 0 insertions, 0 deletions
