[ARM] Add 'fillValidCPUArchList' to ARM targets

This is a support change for a CFE change (https://reviews.llvm.org/D42978)
that allows march and -target-cpu to list the valid targets in a note. The changes
are limited to the ARM/AArch64, since this is the only target that gets the CPU
list from LLVM.

llvm-svn: 324623

1 files changed, 28 insertions, 0 deletions

diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp
index a6e1041e771..997bd4d3238 100644
--- a/llvm/unittests/Support/TargetParserTest.cpp
+++ b/llvm/unittests/Support/TargetParserTest.cpp
@@ -279,6 +279,20 @@ TEST(TargetParserTest, testARMCPU) {
                          "7-S"));
 }
 
+static constexpr int NumARMCPUArchs = 82;
+
+TEST(TargetParserTest, testARMCPUArchList) {
+  SmallVector<StringRef, NumARMCPUArchs> List;
+  ARM::fillValidCPUArchList(List);
+
+  // No list exists for these in this test suite, so ensure all are
+  // valid, and match the expected 'magic' count.
+  EXPECT_EQ(List.size(), NumARMCPUArchs);
+  for(StringRef CPU : List) {
+    EXPECT_NE(ARM::parseCPUArch(CPU), ARM::ArchKind::INVALID);
+  }
+}
+
 TEST(TargetParserTest, testInvalidARMArch) {
   auto InvalidArchStrings = {"armv", "armv99", "noarm"};
   for (const char* InvalidArch : InvalidArchStrings)
@@ -747,6 +761,20 @@ TEST(TargetParserTest, testAArch64CPU) {
       "8-A"));
 }
 
+static constexpr int NumAArch64CPUArchs = 19;
+
+TEST(TargetParserTest, testAArch64CPUArchList) {
+  SmallVector<StringRef, NumAArch64CPUArchs> List;
+  AArch64::fillValidCPUArchList(List);
+
+  // No list exists for these in this test suite, so ensure all are
+  // valid, and match the expected 'magic' count.
+  EXPECT_EQ(List.size(), NumAArch64CPUArchs);
+  for(StringRef CPU : List) {
+    EXPECT_NE(AArch64::parseCPUArch(CPU), AArch64::ArchKind::INVALID);
+  }
+}
+
 bool testAArch64Arch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
                      unsigned ArchAttr) {
   AArch64::ArchKind AK = AArch64::parseArch(Arch);