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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-18 23:24:25 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-18 23:24:25 +0000 |
| commit | d4274f0174ff152490195fa2a65e4087deae3dd4 (patch) | |
| tree | ea5078ee34a2f8f96fe89b1d34affcfcc32f9705 /llvm/unittests/MI | |
| parent | 3b113a2be6dc9a614bd5c95138a6c34d44fe67d9 (diff) | |
| download | bcm5719-llvm-d4274f0174ff152490195fa2a65e4087deae3dd4.tar.gz bcm5719-llvm-d4274f0174ff152490195fa2a65e4087deae3dd4.zip | |
LiveIntervals: Fix handleMoveUp with subreg def moving across a def
If a subregister def was moved across another subregister def and
another use, the main range was not correctly updated. The end point
of the moved interval ended too early and missed the use from theh
other lanes in the subreg def.
llvm-svn: 375300
Diffstat (limited to 'llvm/unittests/MI')
| -rw-r--r-- | llvm/unittests/MI/LiveIntervalTest.cpp | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/llvm/unittests/MI/LiveIntervalTest.cpp b/llvm/unittests/MI/LiveIntervalTest.cpp index c81f13f6e67..782df239dea 100644 --- a/llvm/unittests/MI/LiveIntervalTest.cpp +++ b/llvm/unittests/MI/LiveIntervalTest.cpp @@ -421,6 +421,46 @@ TEST(LiveIntervalTest, DeadSubRegMoveUp) { }); } +TEST(LiveIntervalTest, TestMoveSubRegDefAcrossUseDef) { + liveIntervalTest(R"MIR( + %1:vreg_64 = IMPLICIT_DEF + + bb.1: + %2:vgpr_32 = V_MOV_B32_e32 2, implicit $exec + %3:vgpr_32 = V_ADD_U32_e32 %2, %1.sub0, implicit $exec + undef %1.sub0:vreg_64 = V_ADD_U32_e32 %2, %2, implicit $exec + %1.sub1:vreg_64 = COPY %2 + S_NOP 0, implicit %1.sub1 + S_BRANCH %bb.1 + +)MIR", [](MachineFunction &MF, LiveIntervals &LIS) { + MachineInstr &UndefSubregDef = getMI(MF, 2, 1); + // The scheduler clears undef from subregister defs before moving + UndefSubregDef.getOperand(0).setIsUndef(false); + testHandleMove(MF, LIS, 3, 1, 1); + }); +} + +TEST(LiveIntervalTest, TestMoveSubRegDefAcrossUseDefMulti) { + liveIntervalTest(R"MIR( + %1:vreg_96 = IMPLICIT_DEF + + bb.1: + %2:vgpr_32 = V_MOV_B32_e32 2, implicit $exec + %3:vgpr_32 = V_ADD_U32_e32 %2, %1.sub0, implicit $exec + undef %1.sub0:vreg_96 = V_ADD_U32_e32 %2, %2, implicit $exec + %1.sub1:vreg_96 = COPY %2 + %1.sub2:vreg_96 = COPY %2 + S_NOP 0, implicit %1.sub1, implicit %1.sub2 + S_BRANCH %bb.1 + +)MIR", [](MachineFunction &MF, LiveIntervals &LIS) { + MachineInstr &UndefSubregDef = getMI(MF, 2, 1); + // The scheduler clears undef from subregister defs before moving + UndefSubregDef.getOperand(0).setIsUndef(false); + testHandleMove(MF, LIS, 4, 1, 1); + }); +} int main(int argc, char **argv) { ::testing::InitGoogleTest(&argc, argv); initLLVM(); |

