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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2018-06-20 07:01:14 +0000 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2018-06-20 07:01:14 +0000 |
| commit | d23b6831deb70a7a3cce0d35b25dcfeaad206127 (patch) | |
| tree | a2598743b2898591591597582210ca320e08e05f /llvm/unittests/IR/PatternMatch.cpp | |
| parent | e0aa30008fdaad02bf4ff1871e3a56b51bf33489 (diff) | |
| download | bcm5719-llvm-d23b6831deb70a7a3cce0d35b25dcfeaad206127.tar.gz bcm5719-llvm-d23b6831deb70a7a3cce0d35b25dcfeaad206127.zip | |
[X86][Znver1] Specify Register Files, RCU; FP scheduler capacity.
Summary:
First off: i do not have any access to that processor,
so this is purely theoretical, no benchmarks.
I have been looking into b**d**ver2 scheduling profile, and while cross-referencing
the existing b**t**ver2, znver1 profiles, and the reference docs
(`Software Optimization Guide for AMD Family {15,16,17}h Processors`),
i have noticed that only b**t**ver2 scheduling profile specifies these.
Also, there is no mca test coverage.
Reviewers: RKSimon, craig.topper, courbet, GGanesh, andreadb
Reviewed By: GGanesh
Subscribers: gbedwell, vprasad, ddibyend, shivaram, Ashutosh, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D47676
llvm-svn: 335099
Diffstat (limited to 'llvm/unittests/IR/PatternMatch.cpp')
0 files changed, 0 insertions, 0 deletions
