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author | Volkan Keles <vkeles@apple.com> | 2018-02-14 19:58:36 +0000 |
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committer | Volkan Keles <vkeles@apple.com> | 2018-02-14 19:58:36 +0000 |
commit | 02bb1747a34974e5be571f6d90a5e7ffb3983fb7 (patch) | |
tree | 866dce0fc474b064cfb1c26970782bc5887da56a /llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp | |
parent | af5d499cb9a7bf4edbabec9432f7eb42b5197592 (diff) | |
download | bcm5719-llvm-02bb1747a34974e5be571f6d90a5e7ffb3983fb7.tar.gz bcm5719-llvm-02bb1747a34974e5be571f6d90a5e7ffb3983fb7.zip |
GlobalISel: Add templated functions and pattern matcher support for some more opcodes
Summary:
This patch adds templated functions to MachineIRBuilder for some opcodes
and adds pattern matcher support for G_AND and G_OR.
Reviewers: aditya_nandakumar
Reviewed By: aditya_nandakumar
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D43309
llvm-svn: 325162
Diffstat (limited to 'llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp')
-rw-r--r-- | llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp index dc41e5425d4..d01a1293f7f 100644 --- a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp +++ b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp @@ -210,6 +210,24 @@ TEST(PatternMatchInstr, MatchBinaryOp) { ASSERT_TRUE(match); ASSERT_EQ(Cst, (uint64_t)42); ASSERT_EQ(Src0, Copies[0]); + + // Build AND %0, %1 + auto MIBAnd = B.buildAnd(s64, Copies[0], Copies[1]); + // Try to match AND. + match = mi_match(MIBAnd->getOperand(0).getReg(), MRI, + m_GAnd(m_Reg(Src0), m_Reg(Src1))); + ASSERT_TRUE(match); + ASSERT_EQ(Src0, Copies[0]); + ASSERT_EQ(Src1, Copies[1]); + + // Build OR %0, %1 + auto MIBOr = B.buildOr(s64, Copies[0], Copies[1]); + // Try to match OR. + match = mi_match(MIBOr->getOperand(0).getReg(), MRI, + m_GOr(m_Reg(Src0), m_Reg(Src1))); + ASSERT_TRUE(match); + ASSERT_EQ(Src0, Copies[0]); + ASSERT_EQ(Src1, Copies[1]); } TEST(PatternMatchInstr, MatchExtendsTrunc) { @@ -282,15 +300,23 @@ TEST(PatternMatchInstr, MatchSpecificType) { MachineIRBuilder B(*MF); MachineRegisterInfo &MRI = MF->getRegInfo(); B.setInsertPt(*EntryMBB, EntryMBB->end()); + + // Try to match a 64bit add. LLT s64 = LLT::scalar(64); LLT s32 = LLT::scalar(32); auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); - - // Try to match a 64bit add. ASSERT_FALSE(mi_match(MIBAdd->getOperand(0).getReg(), MRI, m_GAdd(m_SpecificType(s32), m_Reg()))); ASSERT_TRUE(mi_match(MIBAdd->getOperand(0).getReg(), MRI, m_GAdd(m_SpecificType(s64), m_Reg()))); + + // Try to match the destination type of a bitcast. + LLT v2s32 = LLT::vector(2, 32); + auto MIBCast = B.buildCast(v2s32, Copies[0]); + ASSERT_TRUE( + mi_match(MIBCast->getOperand(0).getReg(), MRI, m_SpecificType(v2s32))); + ASSERT_TRUE( + mi_match(MIBCast->getOperand(1).getReg(), MRI, m_SpecificType(s64))); } TEST(PatternMatchInstr, MatchCombinators) { |