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| author | Craig Topper <craig.topper@intel.com> | 2019-04-05 19:28:09 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-04-05 19:28:09 +0000 |
| commit | 80aa2290fb02386579e5d7b0a1d8ce3691fd88da (patch) | |
| tree | 1978efce308a80e3eb9b48155418940531556fb2 /llvm/tools | |
| parent | 7323c2bf850b61b85252e17e6f1f73037c328378 (diff) | |
| download | bcm5719-llvm-80aa2290fb02386579e5d7b0a1d8ce3691fd88da.tar.gz bcm5719-llvm-80aa2290fb02386579e5d7b0a1d8ce3691fd88da.zip | |
[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
Diffstat (limited to 'llvm/tools')
| -rw-r--r-- | llvm/tools/llvm-exegesis/lib/X86/Target.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp index e613aa6299a..6ef1953352f 100644 --- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp +++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp @@ -28,6 +28,7 @@ static Error isInvalidMemoryInstr(const Instruction &Instr) { // These have no memory access. case X86II::Pseudo: case X86II::RawFrm: + case X86II::AddCCFrm: case X86II::MRMDestReg: case X86II::MRMSrcReg: case X86II::MRMSrcReg4VOp3: |
