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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-11-18 21:06:58 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-11-18 21:06:58 +0000 |
| commit | 162c1010bd600b1fd53f5e9f045be611d35e83a1 (patch) | |
| tree | 4bcbe5509674a18e00916d80180813972730ae27 /llvm/tools/llvm-size | |
| parent | 7a7c4684e41e4f7ecf6b77fd162abcb4596a6ec1 (diff) | |
| download | bcm5719-llvm-162c1010bd600b1fd53f5e9f045be611d35e83a1.tar.gz bcm5719-llvm-162c1010bd600b1fd53f5e9f045be611d35e83a1.zip | |
R600/SI: Move SIFixSGPRCopies to inst selector passes
This should expose more of the actually used VALU
instructions to the machine optimization passes.
This also should help getting i1 handling into a better state.
For not entirly understood reasons, this fixes the split-scalar-i64-add.ll
test where a 64-bit add would only partially be moved to the VALU
resulting in use of undefined VCC.
llvm-svn: 222256
Diffstat (limited to 'llvm/tools/llvm-size')
0 files changed, 0 insertions, 0 deletions
