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| author | Diana Picus <diana.picus@linaro.org> | 2017-06-05 12:54:53 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-06-05 12:54:53 +0000 |
| commit | 0091cc3528d8d7edcb2ebbdf1630974069df54c3 (patch) | |
| tree | ceb09fa7fc2278723af75fc9acdc1a418f6749c1 /llvm/tools/llvm-readobj/Error.h | |
| parent | 60a0ea161e81c7edcf77c68c3f7b998b448eddc8 (diff) | |
| download | bcm5719-llvm-0091cc3528d8d7edcb2ebbdf1630974069df54c3.tar.gz bcm5719-llvm-0091cc3528d8d7edcb2ebbdf1630974069df54c3.zip | |
[ARM] GlobalISel: Constrain callee register on indirect calls
When lowering calls, we generate instructions with machine opcodes
rather than generic ones. Therefore, we need to constrain the register
classes of the operands.
Also enable the machine verifier on the arm-irtranslator.ll test, since
that would've caught this issue.
Fixes (part of) PR32146.
llvm-svn: 304712
Diffstat (limited to 'llvm/tools/llvm-readobj/Error.h')
0 files changed, 0 insertions, 0 deletions
