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authorKristof Beyls <kristof.beyls@arm.com>2019-01-23 08:18:39 +0000
committerKristof Beyls <kristof.beyls@arm.com>2019-01-23 08:18:39 +0000
commit3ff5dfd7359de4a6e272ab87b96d1e73b1e57469 (patch)
tree86bc0f9134e51cab2a55a997bacb32d6589fd243 /llvm/tools/llvm-objcopy/COFF/Writer.cpp
parent87b0e3fda9981ca5c5e460532aa28bdc4428675f (diff)
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[SLH] AArch64: correctly pick temporary register to mask SP
As part of speculation hardening, the stack pointer gets masked with the taint register (X16) before a function call or before a function return. Since there are no instructions that can directly mask writing to the stack pointer, the stack pointer must first be transferred to another register, where it can be masked, before that value is transferred back to the stack pointer. Before, that temporary register was always picked to be x17, since the ABI allows clobbering x17 on any function call, resulting in the following instruction pattern being inserted before function calls and returns/tail calls: mov x17, sp and x17, x17, x16 mov sp, x17 However, x17 can be live in those locations, for example when the call is an indirect call, using x17 as the target address (blr x17). To fix this, this patch looks for an available register just before the call or terminator instruction and uses that. In the rare case when no register turns out to be available (this situation is only encountered twice across the whole test-suite), just insert a full speculation barrier at the start of the basic block where this occurs. Differential Revision: https://reviews.llvm.org/D56717 llvm-svn: 351930
Diffstat (limited to 'llvm/tools/llvm-objcopy/COFF/Writer.cpp')
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