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author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-06-29 14:24:46 +0000 |
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committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-06-29 14:24:46 +0000 |
commit | dbaafe6766bf719288e79f468893547c9a12639a (patch) | |
tree | 6464cf4ccaf7538e36650e1f9a3b968219f19b61 /llvm/tools/llvm-mca | |
parent | 2a03d4296a5e462855dd43c9808f406a4f1cea16 (diff) | |
download | bcm5719-llvm-dbaafe6766bf719288e79f468893547c9a12639a.tar.gz bcm5719-llvm-dbaafe6766bf719288e79f468893547c9a12639a.zip |
[llvm-mca] Remove field HasReadAdvanceEntries from class ReadDescriptor.
This simplifies the logic that updates RAW dependencies in the DispatchStage.
There is no advantage in storing that flag in the ReadDescriptor; we should
simply rely on the call to `STI.getReadAdvanceCycles()` to obtain the
ReadAdvance cycles. If there are no read-advance entries, then method
`getReadAdvanceCycles()` quickly returns 0.
No functional change intended.
llvm-svn: 335977
Diffstat (limited to 'llvm/tools/llvm-mca')
-rw-r--r-- | llvm/tools/llvm-mca/DispatchStage.cpp | 6 | ||||
-rw-r--r-- | llvm/tools/llvm-mca/InstrBuilder.cpp | 4 | ||||
-rw-r--r-- | llvm/tools/llvm-mca/Instruction.h | 5 |
3 files changed, 0 insertions, 15 deletions
diff --git a/llvm/tools/llvm-mca/DispatchStage.cpp b/llvm/tools/llvm-mca/DispatchStage.cpp index 1bc292aae52..21eef3d93d6 100644 --- a/llvm/tools/llvm-mca/DispatchStage.cpp +++ b/llvm/tools/llvm-mca/DispatchStage.cpp @@ -82,12 +82,6 @@ void DispatchStage::updateRAWDependencies(ReadState &RS, // For each write, check if we have ReadAdvance information, and use it // to figure out in how many cycles this read becomes available. const ReadDescriptor &RD = RS.getDescriptor(); - if (!RD.HasReadAdvanceEntries) { - for (WriteRef &WR : DependentWrites) - WR.getWriteState()->addUser(&RS, /* ReadAdvance */ 0); - return; - } - const MCSchedModel &SM = STI.getSchedModel(); const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID); for (WriteRef &WR : DependentWrites) { diff --git a/llvm/tools/llvm-mca/InstrBuilder.cpp b/llvm/tools/llvm-mca/InstrBuilder.cpp index fd849bb7240..b1ed2daac38 100644 --- a/llvm/tools/llvm-mca/InstrBuilder.cpp +++ b/llvm/tools/llvm-mca/InstrBuilder.cpp @@ -265,8 +265,6 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI, const MCSchedClassDesc &SCDesc, const MCSubtargetInfo &STI) { unsigned SchedClassID = MCDesc.getSchedClass(); - bool HasReadAdvanceEntries = SCDesc.NumReadAdvanceEntries > 0; - unsigned i = 0; unsigned NumExplicitDefs = MCDesc.getNumDefs(); // Skip explicit definitions. @@ -295,7 +293,6 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI, ReadDescriptor &Read = ID.Reads[CurrentUse]; Read.OpIndex = i + CurrentUse; Read.UseIndex = CurrentUse; - Read.HasReadAdvanceEntries = HasReadAdvanceEntries; Read.SchedClassID = SchedClassID; LLVM_DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex); } @@ -305,7 +302,6 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI, Read.OpIndex = ~CurrentUse; Read.UseIndex = NumExplicitUses + CurrentUse; Read.RegisterID = MCDesc.getImplicitUses()[CurrentUse]; - Read.HasReadAdvanceEntries = HasReadAdvanceEntries; Read.SchedClassID = SchedClassID; LLVM_DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex << ", RegisterID=" << Read.RegisterID << '\n'); diff --git a/llvm/tools/llvm-mca/Instruction.h b/llvm/tools/llvm-mca/Instruction.h index 2df6a59f38c..b15b17a2f51 100644 --- a/llvm/tools/llvm-mca/Instruction.h +++ b/llvm/tools/llvm-mca/Instruction.h @@ -77,11 +77,6 @@ struct ReadDescriptor { // Scheduling Class Index. It is used to query the scheduling model for the // MCSchedClassDesc object. unsigned SchedClassID; - // True if there may be a local forwarding logic in hardware to serve a - // write used by this read. This information, along with SchedClassID, is - // used to dynamically check at Instruction creation time, if the input - // operands can benefit from a ReadAdvance bonus. - bool HasReadAdvanceEntries; bool isImplicitRead() const { return OpIndex < 0; }; }; |