[llvm-mca] Replace InstRef::isValid with operator bool. NFC.

llvm-svn: 345190

6 files changed, 12 insertions, 17 deletions

diff --git a/llvm/tools/llvm-mca/include/Instruction.h b/llvm/tools/llvm-mca/include/Instruction.h
index ca84b86d70d..a1d1082a215 100644
--- a/llvm/tools/llvm-mca/include/Instruction.h
+++ b/llvm/tools/llvm-mca/include/Instruction.h
@@ -444,7 +444,7 @@ public:
   const Instruction *getInstruction() const { return Data.second; }
 
   /// Returns true if this references a valid instruction.
-  bool isValid() const { return Data.second; }
+  operator bool() const { return Data.second != nullptr; }
 
   /// Invalidate this reference.
   void invalidate() { Data.second = nullptr; }
diff --git a/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp b/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
index af1b01f49dc..8f543eeb8c2 100644
--- a/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
+++ b/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
@@ -63,7 +63,7 @@ const RetireControlUnit::RUToken &RetireControlUnit::peekCurrentToken() const {
 void RetireControlUnit::consumeCurrentToken() {
   const RetireControlUnit::RUToken &Current = peekCurrentToken();
   assert(Current.NumSlots && "Reserved zero slots?");
-  assert(Current.IR.isValid() && "Invalid RUToken in the RCU queue.");
+  assert(Current.IR && "Invalid RUToken in the RCU queue.");
 
   // Update the slot index to be the next item in the circular queue.
   CurrentInstructionSlotIdx += Current.NumSlots;
@@ -73,7 +73,7 @@ void RetireControlUnit::consumeCurrentToken() {
 
 void RetireControlUnit::onInstructionExecuted(unsigned TokenID) {
   assert(Queue.size() > TokenID);
-  assert(Queue[TokenID].Executed == false && Queue[TokenID].IR.isValid());
+  assert(Queue[TokenID].Executed == false && Queue[TokenID].IR);
   Queue[TokenID].Executed = true;
 }
 
diff --git a/llvm/tools/llvm-mca/lib/HardwareUnits/Scheduler.cpp b/llvm/tools/llvm-mca/lib/HardwareUnits/Scheduler.cpp
index 8bfa761c8a1..3d91cb12c2d 100644
--- a/llvm/tools/llvm-mca/lib/HardwareUnits/Scheduler.cpp
+++ b/llvm/tools/llvm-mca/lib/HardwareUnits/Scheduler.cpp
@@ -108,7 +108,7 @@ void Scheduler::promoteToReadySet(SmallVectorImpl<InstRef> &Ready) {
   unsigned RemovedElements = 0;
   for (auto I = WaitSet.begin(), E = WaitSet.end(); I != E;) {
     InstRef &IR = *I;
-    if (!IR.isValid())
+    if (!IR)
       break;
 
     // Check if this instruction is now ready. In case, force
@@ -160,7 +160,7 @@ void Scheduler::updateIssuedSet(SmallVectorImpl<InstRef> &Executed) {
   unsigned RemovedElements = 0;
   for (auto I = IssuedSet.begin(), E = IssuedSet.end(); I != E;) {
     InstRef &IR = *I;
-    if (!IR.isValid())
+    if (!IR)
       break;
     Instruction &IS = *IR.getInstruction();
     if (!IS.isExecuted()) {
diff --git a/llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp b/llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp
index a6be2474554..653f39bf5b7 100644
--- a/llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp
+++ b/llvm/tools/llvm-mca/lib/Stages/DispatchStage.cpp
@@ -154,7 +154,7 @@ Error DispatchStage::cycleStart() {
   AvailableEntries = CarryOver >= DispatchWidth ? 0 : DispatchWidth - CarryOver;
   unsigned DispatchedOpcodes = DispatchWidth - AvailableEntries;
   CarryOver -= DispatchedOpcodes;
-  assert(CarriedOver.isValid() && "Invalid dispatched instruction");
+  assert(CarriedOver && "Invalid dispatched instruction");
 
   SmallVector<unsigned, 8> RegisterFiles(PRF.getNumRegisterFiles(), 0U);
   notifyInstructionDispatched(CarriedOver, RegisterFiles, DispatchedOpcodes);
diff --git a/llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp b/llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp
index fa297148167..3b45a84c338 100644
--- a/llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp
+++ b/llvm/tools/llvm-mca/lib/Stages/ExecuteStage.cpp
@@ -73,7 +73,7 @@ Error ExecuteStage::issueInstruction(InstRef &IR) {
 
 Error ExecuteStage::issueReadyInstructions() {
   InstRef IR = HWS.select();
-  while (IR.isValid()) {
+  while (IR) {
     if (Error Err = issueInstruction(IR))
       return Err;
 
@@ -107,7 +107,6 @@ Error ExecuteStage::cycleStart() {
   return issueReadyInstructions();
 }
 
-
 #ifndef NDEBUG
 static void verifyInstructionEliminated(const InstRef &IR) {
   const Instruction &Inst = *IR.getInstruction();
@@ -121,7 +120,6 @@ static void verifyInstructionEliminated(const InstRef &IR) {
 }
 #endif
 
-
 Error ExecuteStage::handleInstructionEliminated(InstRef &IR) {
 #ifndef NDEBUG
   verifyInstructionEliminated(IR);
diff --git a/llvm/tools/llvm-mca/lib/Stages/FetchStage.cpp b/llvm/tools/llvm-mca/lib/Stages/FetchStage.cpp
index e607db9c8f0..515dc15c5b3 100644
--- a/llvm/tools/llvm-mca/lib/Stages/FetchStage.cpp
+++ b/llvm/tools/llvm-mca/lib/Stages/FetchStage.cpp
@@ -17,19 +17,16 @@
 
 namespace mca {
 
-bool FetchStage::hasWorkToComplete() const {
-  return CurrentInstruction.isValid();
-}
+bool FetchStage::hasWorkToComplete() const { return CurrentInstruction; }
 
 bool FetchStage::isAvailable(const InstRef & /* unused */) const {
-  if (CurrentInstruction.isValid())
+  if (CurrentInstruction)
     return checkNextStage(CurrentInstruction);
   return false;
 }
 
 llvm::Error FetchStage::getNextInstruction() {
-  assert(!CurrentInstruction.isValid() &&
-         "There is already an instruction to process!");
+  assert(!CurrentInstruction && "There is already an instruction to process!");
   if (!SM.hasNext())
     return llvm::ErrorSuccess();
   const SourceRef SR = SM.peekNext();
@@ -45,7 +42,7 @@ llvm::Error FetchStage::getNextInstruction() {
 }
 
 llvm::Error FetchStage::execute(InstRef & /*unused */) {
-  assert(CurrentInstruction.isValid() && "There is no instruction to process!");
+  assert(CurrentInstruction && "There is no instruction to process!");
   if (llvm::Error Val = moveToTheNextStage(CurrentInstruction))
     return Val;
 
@@ -55,7 +52,7 @@ llvm::Error FetchStage::execute(InstRef & /*unused */) {
 }
 
 llvm::Error FetchStage::cycleStart() {
-  if (!CurrentInstruction.isValid())
+  if (!CurrentInstruction)
     return getNextInstruction();
   return llvm::ErrorSuccess();
 }