[llvm-mca] Remove redundant namespace prefixes. NFC

We are already "using" namespace llvm in all the files modified by this change.

llvm-svn: 343312

3 files changed, 10 insertions, 10 deletions

diff --git a/llvm/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp b/llvm/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
index 20db2b83036..eae160c6ffd 100644
--- a/llvm/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
+++ b/llvm/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
@@ -24,8 +24,8 @@ using namespace llvm;
 
 namespace mca {
 
-RegisterFile::RegisterFile(const llvm::MCSchedModel &SM,
-                           const llvm::MCRegisterInfo &mri, unsigned NumRegs)
+RegisterFile::RegisterFile(const MCSchedModel &SM, const MCRegisterInfo &mri,
+                           unsigned NumRegs)
     : MRI(mri),
       RegisterMappings(mri.getNumRegs(), {WriteRef(), RegisterRenamingInfo()}),
       ZeroRegisters(mri.getNumRegs(), false) {
@@ -281,7 +281,7 @@ void RegisterFile::collectWrites(SmallVectorImpl<WriteRef> &Writes,
   }
 
   // Remove duplicate entries and resize the input vector.
-  llvm::sort(Writes, [](const WriteRef &Lhs, const WriteRef &Rhs) {
+  sort(Writes, [](const WriteRef &Lhs, const WriteRef &Rhs) {
     return Lhs.getWriteState() < Rhs.getWriteState();
   });
   auto It = std::unique(Writes.begin(), Writes.end());
diff --git a/llvm/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp b/llvm/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp
index b3dcfa7b498..46a374c2102 100644
--- a/llvm/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp
+++ b/llvm/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp
@@ -35,10 +35,10 @@ void DefaultResourceStrategy::skipMask(uint64_t Mask) {
 
 uint64_t DefaultResourceStrategy::select(uint64_t ReadyMask) {
   // This method assumes that ReadyMask cannot be zero.
-  uint64_t CandidateMask = llvm::PowerOf2Floor(NextInSequenceMask);
+  uint64_t CandidateMask = PowerOf2Floor(NextInSequenceMask);
   while (!(ReadyMask & CandidateMask)) {
     skipMask(CandidateMask);
-    CandidateMask = llvm::PowerOf2Floor(NextInSequenceMask);
+    CandidateMask = PowerOf2Floor(NextInSequenceMask);
   }
   return CandidateMask;
 }
@@ -55,8 +55,8 @@ ResourceState::ResourceState(const MCProcResourceDesc &Desc, unsigned Index,
                              uint64_t Mask)
     : ProcResourceDescIndex(Index), ResourceMask(Mask),
       BufferSize(Desc.BufferSize) {
-  if (llvm::countPopulation(ResourceMask) > 1)
-    ResourceSizeMask = ResourceMask ^ llvm::PowerOf2Floor(ResourceMask);
+  if (countPopulation(ResourceMask) > 1)
+    ResourceSizeMask = ResourceMask ^ PowerOf2Floor(ResourceMask);
   else
     ResourceSizeMask = (1ULL << Desc.NumUnits) - 1;
   ReadyMask = ResourceSizeMask;
@@ -66,7 +66,7 @@ ResourceState::ResourceState(const MCProcResourceDesc &Desc, unsigned Index,
 
 bool ResourceState::isReady(unsigned NumUnits) const {
   return (!isReserved() || isADispatchHazard()) &&
-         llvm::countPopulation(ReadyMask) >= NumUnits;
+         countPopulation(ReadyMask) >= NumUnits;
 }
 
 ResourceStateEvent ResourceState::isBufferAvailable() const {
@@ -87,7 +87,7 @@ void ResourceState::dump() const {
 #endif
 
 static unsigned getResourceStateIndex(uint64_t Mask) {
-  return std::numeric_limits<uint64_t>::digits - llvm::countLeadingZeros(Mask);
+  return std::numeric_limits<uint64_t>::digits - countLeadingZeros(Mask);
 }
 
 static std::unique_ptr<ResourceStrategy>
diff --git a/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp b/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
index 205fe84a709..ca3cc8cfafb 100644
--- a/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
+++ b/llvm/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
@@ -21,7 +21,7 @@ using namespace llvm;
 
 namespace mca {
 
-RetireControlUnit::RetireControlUnit(const llvm::MCSchedModel &SM)
+RetireControlUnit::RetireControlUnit(const MCSchedModel &SM)
     : NextAvailableSlotIdx(0), CurrentInstructionSlotIdx(0),
       AvailableSlots(SM.MicroOpBufferSize), MaxRetirePerCycle(0) {
   // Check if the scheduling model provides extra information about the machine