[llvm-mca] Check for inconsistencies when constructing instruction descriptors.

This should help with catching inconsistent definitions of instructions with
zero opcodes, which also declare to consume scheduler/pipeline resources.

llvm-svn: 343766

1 files changed, 5 insertions, 0 deletions

diff --git a/llvm/tools/llvm-mca/include/HardwareUnits/RetireControlUnit.h b/llvm/tools/llvm-mca/include/HardwareUnits/RetireControlUnit.h
index 7f2d699e410..552a2094ff1 100644
--- a/llvm/tools/llvm-mca/include/HardwareUnits/RetireControlUnit.h
+++ b/llvm/tools/llvm-mca/include/HardwareUnits/RetireControlUnit.h
@@ -70,6 +70,11 @@ public:
     // of the reorder buffer. To avoid problems, cap the amount of slots to
     // the size of the reorder buffer.
     Quantity = std::min(Quantity, static_cast<unsigned>(Queue.size()));
+
+    // Further normalize the number of micro opcodes for instructions that
+    // declare zero opcodes. This should match the behavior of method
+    // reserveSlot().
+    Quantity = std::max(Quantity, 1U);
     return AvailableSlots >= Quantity;
   }