[llvm-mca] Updates comment in code, and remove some stale comments. NFC

Also, rename fields `TotalMappings` and `NumUsedMappings` in struct
RegisterMappingTracker into `NumPhysRegs` and `NumUsedPhysRegs`.

llvm-svn: 335219

1 files changed, 63 insertions, 66 deletions

diff --git a/llvm/tools/llvm-mca/RegisterFile.h b/llvm/tools/llvm-mca/RegisterFile.h
index 0738789d21c..7d5d22bb61d 100644
--- a/llvm/tools/llvm-mca/RegisterFile.h
+++ b/llvm/tools/llvm-mca/RegisterFile.h
@@ -26,94 +26,93 @@ namespace mca {
 class ReadState;
 class WriteState;
 
-/// Manages hardware register files, and tracks data dependencies
-/// between registers.
+/// Manages hardware register files, and tracks register definitions for
+/// register renaming purposes.
 class RegisterFile {
   const llvm::MCRegisterInfo &MRI;
 
-  // Each register file is described by an instance of RegisterMappingTracker.
-  // RegisterMappingTracker tracks the number of register mappings dynamically
-  // allocated during the execution.
+  // Each register file is associated with an instance of RegisterMappingTracker.
+  // A RegisterMappingTracker keeps track of the number of physical registers
+  // which have been dynamically allocated by the simulator.
   struct RegisterMappingTracker {
-    // Total number of register mappings that are available for register
-    // renaming. A value of zero for this field means: this register file has
-    // an unbounded number of registers.
-    const unsigned TotalMappings;
-    // Number of mappings that are currently in use.
-    unsigned NumUsedMappings;
-
-    RegisterMappingTracker(unsigned NumMappings)
-        : TotalMappings(NumMappings), NumUsedMappings(0) {}
+    // The total number of physical registers that are available in this
+    // register file for register renaming purpouses.  A value of zero for this
+    // field means: this register file has an unbounded number of physical
+    // registers.
+    const unsigned NumPhysRegs;
+    // Number of physical registers that are currently in use.
+    unsigned NumUsedPhysRegs;
+
+    RegisterMappingTracker(unsigned NumPhysRegisters)
+        : NumPhysRegs(NumPhysRegisters), NumUsedPhysRegs(0) {}
   };
 
-  // This is where information related to the various register files is kept.
-  // This set always contains at least one register file at index #0. That
-  // register file "sees" all the physical registers declared by the target, and
-  // (by default) it allows an unbounded number of mappings.
-  // Users can limit the number of mappings that can be created by register file
-  // #0 through the command line flag `-register-file-size`.
+  // A vector of register file descriptors.  This set always contains at least
+  // one entry. Entry at index #0 is reserved.  That entry describes a register
+  // file with an unbounded number of physical registers that "sees" all the
+  // hardware registers declared by the target (i.e. all the register
+  // definitions in the target specific `XYZRegisterInfo.td` - where `XYZ` is
+  // the target name).
+  // 
+  // Users can limit the number of physical registers that are available in
+  // regsiter file #0 specifying command line flag `-register-file-size=<uint>`.
   llvm::SmallVector<RegisterMappingTracker, 4> RegisterFiles;
 
-  // This pair is used to identify the owner of a physical register, as well as
-  // the cost of using that register file.
+  // This pair is used to identify the owner of a register, as well as
+  // the "register cost". Register cost is defined as the number of physical
+  // registers required to allocate a user register.
+  // For example: on X86 BtVer2, a YMM register consumes 2 128-bit physical
+  // registers. So, the cost of allocating a YMM register in BtVer2 is 2.
   using IndexPlusCostPairTy = std::pair<unsigned, unsigned>;
 
   // RegisterMapping objects are mainly used to track physical register
-  // definitions. A WriteState object describes a register definition, and it is
-  // used to track RAW dependencies (see Instruction.h).  A RegisterMapping
-  // object also specifies the set of register files.  The mapping between
-  // physreg and register files is done using a "register file mask".
-  //
-  // A register file index identifies a user defined register file.
-  // There is one index per RegisterMappingTracker, and index #0 is reserved to
-  // the default unified register file.
+  // definitions. There is a RegisterMapping for every register defined by the
+  // Target. For each register, a RegisterMapping pair contains a descriptor of
+  // the last register write (in the form of a WriteState object), as well as a
+  // IndexPlusCostPairTy to quickly identify owning register files.
   //
   // This implementation does not allow overlapping register files. The only
   // register file that is allowed to overlap with other register files is
-  // register file #0.
+  // register file #0. If we exclude register #0, every register is "owned" by
+  // at most one register file.
   using RegisterMapping = std::pair<WriteState *, IndexPlusCostPairTy>;
 
-  // This map contains one entry for each physical register defined by the
-  // processor scheduling model.
+  // This map contains one entry for each register defined by the target.
   std::vector<RegisterMapping> RegisterMappings;
 
-  // This method creates a new RegisterMappingTracker for a register file that
-  // contains all the physical registers specified by the register classes in
-  // the 'RegisterClasses' set.
+  // This method creates a new register file descriptor.
+  // The new register file owns all of the registers declared by register
+  // classes in the 'RegisterClasses' set.
   //
-  // The long term goal is to let scheduling models optionally describe register
-  // files via tablegen definitions. This is still a work in progress.
-  // For example, here is how a tablegen definition for a x86 FP register file
-  // that features AVX might look like:
+  // Processor models allow the definition of RegisterFile(s) via tablegen. For
+  // example, this is a tablegen definition for a x86 register file for
+  // XMM[0-15] and YMM[0-15], that allows up to 60 renames (each rename costs 1
+  // physical register).
   //
-  //    def FPRegisterFile : RegisterFile<[VR128RegClass, VR256RegClass], 60>
+  //    def FPRegisterFile : RegisterFile<60, [VR128RegClass, VR256RegClass]>
   //
   // Here FPRegisterFile contains all the registers defined by register class
   // VR128RegClass and VR256RegClass. FPRegisterFile implements 60
   // registers which can be used for register renaming purpose.
-  //
-  // The list of register classes is then converted by the tablegen backend into
-  // a list of register class indices. That list, along with the number of
-  // available mappings, is then used to create a new RegisterMappingTracker.
   void
   addRegisterFile(llvm::ArrayRef<llvm::MCRegisterCostEntry> RegisterClasses,
                   unsigned NumPhysRegs);
 
-  // Allocates register mappings in register file specified by the
-  // IndexPlusCostPairTy object. This method is called from addRegisterMapping.
+  // Consumes physical registers in each register file specified by the
+  // `IndexPlusCostPairTy`. This method is called from `addRegisterMapping()`.
   void allocatePhysRegs(IndexPlusCostPairTy IPC,
                         llvm::MutableArrayRef<unsigned> UsedPhysRegs);
 
-  // Removes a previously allocated mapping from the register file referenced
-  // by the IndexPlusCostPairTy object. This method is called from
-  // invalidateRegisterMapping.
+  // Releases previously allocated physical registers from the register file(s)
+  // referenced by the IndexPlusCostPairTy object. This method is called from
+  // `invalidateRegisterMapping()`.
   void freePhysRegs(IndexPlusCostPairTy IPC,
                     llvm::MutableArrayRef<unsigned> FreedPhysRegs);
 
   // Create an instance of RegisterMappingTracker for every register file
   // specified by the processor model.
-  // If no register file is specified, then this method creates a single
-  // register file with an unbounded number of registers.
+  // If no register file is specified, then this method creates a default
+  // register file with an unbounded number of physical registers.
   void initialize(const llvm::MCSchedModel &SM, unsigned NumRegs);
 
 public:
@@ -123,28 +122,26 @@ public:
     initialize(SM, NumRegs);
   }
 
-  // This method updates the data dependency graph by inserting a new register
-  // definition. This method is also responsible for updating the number of used
-  // physical registers in the register file(s). The number of physical
-  // registers is updated only if flag ShouldAllocatePhysRegs is set.
+  // This method updates the register mappings inserting a new register
+  // definition. This method is also responsible for updating the number of
+  // allocated physical registers in each register file modified by the write.
+  // No physical regiser is allocated when flag ShouldAllocatePhysRegs is set.
   void addRegisterWrite(WriteState &WS,
                         llvm::MutableArrayRef<unsigned> UsedPhysRegs,
                         bool ShouldAllocatePhysRegs = true);
 
-  // Updates the data dependency graph by removing a write. It also updates the
-  // internal state of the register file(s) by freeing physical registers.
-  // The number of physical registers is updated only if flag ShouldFreePhysRegs
-  // is set.
+  // Removes write \param WS from the register mappings.
+  // Physical registers may be released to reflect this update.
   void removeRegisterWrite(const WriteState &WS,
                            llvm::MutableArrayRef<unsigned> FreedPhysRegs,
                            bool ShouldFreePhysRegs = true);
 
-  // Checks if there are enough microarchitectural registers in the register
-  // files.  Returns a "response mask" where each bit is the response from a
-  // RegisterMappingTracker.
-  // For example: if all register files are available, then the response mask
-  // is a bitmask of all zeroes. If Instead register file #1 is not available,
-  // then the response mask is 0b10.
+  // Checks if there are enough physical registers in the register files.
+  // Returns a "response mask" where each bit represents the response from a
+  // different register file.  A mask of all zeroes means that all register
+  // files are available.  Otherwise, the mask can be used to identify which
+  // register file was busy.  This sematic allows us classify dispatch dispatch
+  // stalls caused by the lack of register file resources.
   unsigned isAvailable(llvm::ArrayRef<unsigned> Regs) const;
   void collectWrites(llvm::SmallVectorImpl<WriteState *> &Writes,
                      unsigned RegID) const;