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authorNicola Zaghen <nicola.zaghen@imgtec.com>2018-05-14 12:53:11 +0000
committerNicola Zaghen <nicola.zaghen@imgtec.com>2018-05-14 12:53:11 +0000
commitd34e60ca8532511acb8c93ef26297e349fbec86a (patch)
tree1a095bc8694498d94232e81b95c1da05d462d3ec /llvm/tools/llvm-mca/InstrBuilder.cpp
parentaffbc99bea94e77f7ebccd8ba887e33051bd04ee (diff)
downloadbcm5719-llvm-d34e60ca8532511acb8c93ef26297e349fbec86a.tar.gz
bcm5719-llvm-d34e60ca8532511acb8c93ef26297e349fbec86a.zip
Rename DEBUG macro to LLVM_DEBUG.
The DEBUG() macro is very generic so it might clash with other projects. The renaming was done as follows: - git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g' - git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM - Manual change to APInt - Manually chage DOCS as regex doesn't match it. In the transition period the DEBUG() macro is still present and aliased to the LLVM_DEBUG() one. Differential Revision: https://reviews.llvm.org/D43624 llvm-svn: 332240
Diffstat (limited to 'llvm/tools/llvm-mca/InstrBuilder.cpp')
-rw-r--r--llvm/tools/llvm-mca/InstrBuilder.cpp22
1 files changed, 11 insertions, 11 deletions
diff --git a/llvm/tools/llvm-mca/InstrBuilder.cpp b/llvm/tools/llvm-mca/InstrBuilder.cpp
index 7b4ad38d865..bca3e4bc0d7 100644
--- a/llvm/tools/llvm-mca/InstrBuilder.cpp
+++ b/llvm/tools/llvm-mca/InstrBuilder.cpp
@@ -113,7 +113,7 @@ static void initializeUsedResources(InstrDesc &ID,
}
}
- DEBUG({
+ LLVM_DEBUG({
for (const std::pair<uint64_t, ResourceUsage> &R : ID.Resources)
dbgs() << "\t\tMask=" << R.first << ", cy=" << R.second.size() << '\n';
for (const uint64_t R : ID.Buffers)
@@ -259,7 +259,7 @@ static void populateWrites(InstrDesc &ID, const MCInst &MCI,
}
Write.FullyUpdatesSuperRegs = FullyUpdatesSuperRegisters;
Write.IsOptionalDef = false;
- DEBUG({
+ LLVM_DEBUG({
dbgs() << "\t\tOpIdx=" << Write.OpIndex << ", Latency=" << Write.Latency
<< ", WriteResourceID=" << Write.SClassOrWriteResourceID << '\n';
});
@@ -290,10 +290,10 @@ static void populateWrites(InstrDesc &ID, const MCInst &MCI,
Write.IsOptionalDef = false;
assert(Write.RegisterID != 0 && "Expected a valid phys register!");
- DEBUG(dbgs() << "\t\tOpIdx=" << Write.OpIndex << ", PhysReg="
- << Write.RegisterID << ", Latency=" << Write.Latency
- << ", WriteResourceID=" << Write.SClassOrWriteResourceID
- << '\n');
+ LLVM_DEBUG(dbgs() << "\t\tOpIdx=" << Write.OpIndex << ", PhysReg="
+ << Write.RegisterID << ", Latency=" << Write.Latency
+ << ", WriteResourceID=" << Write.SClassOrWriteResourceID
+ << '\n');
}
if (MCDesc.hasOptionalDef()) {
@@ -352,7 +352,7 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI,
Read.UseIndex = CurrentUse;
Read.HasReadAdvanceEntries = HasReadAdvanceEntries;
Read.SchedClassID = SchedClassID;
- DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex);
+ LLVM_DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex);
}
for (unsigned CurrentUse = 0; CurrentUse < NumImplicitUses; ++CurrentUse) {
@@ -362,8 +362,8 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI,
Read.RegisterID = MCDesc.getImplicitUses()[CurrentUse];
Read.HasReadAdvanceEntries = HasReadAdvanceEntries;
Read.SchedClassID = SchedClassID;
- DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex
- << ", RegisterID=" << Read.RegisterID << '\n');
+ LLVM_DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex
+ << ", RegisterID=" << Read.RegisterID << '\n');
}
}
@@ -413,8 +413,8 @@ const InstrDesc &InstrBuilder::createInstrDescImpl(const MCInst &MCI) {
populateWrites(*ID, MCI, MCDesc, SCDesc, STI);
populateReads(*ID, MCI, MCDesc, SCDesc, STI);
- DEBUG(dbgs() << "\t\tMaxLatency=" << ID->MaxLatency << '\n');
- DEBUG(dbgs() << "\t\tNumMicroOps=" << ID->NumMicroOps << '\n');
+ LLVM_DEBUG(dbgs() << "\t\tMaxLatency=" << ID->MaxLatency << '\n');
+ LLVM_DEBUG(dbgs() << "\t\tNumMicroOps=" << ID->NumMicroOps << '\n');
// Now add the new descriptor.
Descriptors[Opcode] = std::move(ID);
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