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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-03-19 13:22:49 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-03-19 13:22:49 +0000 |
| commit | 87793e75993621d63ab7b973102598097992cea3 (patch) | |
| tree | b3ee5682383c0fabcbe92a8adfce2f2bad24faa5 /llvm/tools/llvm-mca/Backend.cpp | |
| parent | f646bcc2de499becbe66f9946ef9aeb8d8146c3e (diff) | |
| download | bcm5719-llvm-87793e75993621d63ab7b973102598097992cea3.tar.gz bcm5719-llvm-87793e75993621d63ab7b973102598097992cea3.zip | |
[ARM] Pass half or i16 types for NEON intrinsics
For generating NEON intrinsics, this determines the NEON data type, and whether
it should be a half type or an i16 type. I.e., we always pass a half type for
AArch64, this hasn't changed, but now also for ARM but only when FullFP16 is
enabled, and i16 otherwise.
This is intended to be non-functional change, but together with the backend
work in D44538 which adds support for f16 vectors, this enables adding the
AArch32 FP16 (vector) intrinsics.
Differential Revision: https://reviews.llvm.org/D44561
llvm-svn: 327836
Diffstat (limited to 'llvm/tools/llvm-mca/Backend.cpp')
0 files changed, 0 insertions, 0 deletions
