[llvm-exegesis][X86] Handle CMOVcc/SETcc OPERAND_COND_CODE OperandType

Summary:
D60041 / D60138 refactoring changed how CMOV/SETcc opcodes
are handled. concode is now an immediate, with it's own operand type.

This at least allows to not crash on the opcode.
However, this still won't generate all the snippets
with all the condcode enumerators. D60066 does that.

Reviewers: courbet, gchatelet

Reviewed By: gchatelet

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60057

llvm-svn: 357841

1 files changed, 21 insertions, 0 deletions

diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
index 6ef1953352f..01e3589cc2d 100644
--- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp
@@ -433,6 +433,10 @@ private:
 
   unsigned getMaxMemoryAccessSize() const override { return 64; }
 
+  void randomizeMCOperand(const Instruction &Instr, const Variable &Var,
+                          llvm::MCOperand &AssignedValue,
+                          const llvm::BitVector &ForbiddenRegs) const override;
+
   void fillMemoryOperands(InstructionTemplate &IT, unsigned Reg,
                           unsigned Offset) const override;
 
@@ -485,6 +489,23 @@ ExegesisX86Target::getScratchMemoryRegister(const llvm::Triple &TT) const {
   return TT.isOSWindows() ? llvm::X86::RCX : llvm::X86::RDI;
 }
 
+void ExegesisX86Target::randomizeMCOperand(
+    const Instruction &Instr, const Variable &Var,
+    llvm::MCOperand &AssignedValue,
+    const llvm::BitVector &ForbiddenRegs) const {
+  ExegesisTarget::randomizeMCOperand(Instr, Var, AssignedValue, ForbiddenRegs);
+
+  const Operand &Op = Instr.getPrimaryOperand(Var);
+  switch (Op.getExplicitOperandInfo().OperandType) {
+  case llvm::X86::OperandType::OPERAND_COND_CODE:
+    // FIXME: explore all CC variants.
+    AssignedValue = llvm::MCOperand::createImm(1);
+    break;
+  default:
+    break;
+  }
+}
+
 void ExegesisX86Target::fillMemoryOperands(InstructionTemplate &IT,
                                            unsigned Reg,
                                            unsigned Offset) const {