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| author | Hao Liu <Hao.Liu@arm.com> | 2013-11-25 01:53:26 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2013-11-25 01:53:26 +0000 |
| commit | fbd2b4484c12d3e7b3ac5bd0a270024f4688c29b (patch) | |
| tree | 12a7fbce7a472a12df093c03cc5791ae541a0549 /llvm/test | |
| parent | edbeaee8576a324ddd0ee403681e22339177921c (diff) | |
| download | bcm5719-llvm-fbd2b4484c12d3e7b3ac5bd0a270024f4688c29b.tar.gz bcm5719-llvm-fbd2b4484c12d3e7b3ac5bd0a270024f4688c29b.zip | |
Fixed a bug about disassembling AArch64 post-index load/store single element instructions.
ie. echo "0x00 0x04 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
echo "0x00 0x00 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
will be disassembled into the same instruction st1 {v0b}[0], [x0], x0.
llvm-svn: 195591
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/neon-instructions.txt | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt b/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt index 9f9e7772857..03974806cd9 100644 --- a/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt +++ b/llvm/test/MC/Disassembler/AArch64/neon-instructions.txt @@ -2126,14 +2126,14 @@ # Post-index of vector load/store single N-element structure to/from # one lane of N consecutive registers (N = 1,2,3,4) #---------------------------------------------------------------------- -# CHECK: ld1 {v0.b}[0], [x0], #1 -# CHECK: ld2 {v15.h, v16.h}[0], [x15], #4 -# CHECK: ld3 {v31.s, v0.s, v1.s}[0], [sp], x3 +# CHECK: ld1 {v0.b}[9], [x0], #1 +# CHECK: ld2 {v15.h, v16.h}[7], [x15], #4 +# CHECK: ld3 {v31.s, v0.s, v1.s}[3], [sp], x3 # CHECK: ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #24 -# CHECK: st1 {v0.d}[0], [x0], #8 -# CHECK: st2 {v31.s, v0.s}[0], [sp], #8 -# CHECK: st3 {v15.h, v16.h, v17.h}[0], [x15], #6 -# CHECK: st4 {v0.b, v1.b, v2.b, v3.b}[1], [x0], x5 +# CHECK: st1 {v0.d}[1], [x0], #8 +# CHECK: st2 {v31.s, v0.s}[3], [sp], #8 +# CHECK: st3 {v15.h, v16.h, v17.h}[7], [x15], #6 +# CHECK: st4 {v0.b, v1.b, v2.b, v3.b}[9], [x0], x5 0x00,0x04,0xdf,0x4d 0xef,0x59,0xff,0x4d 0xff,0xb3,0xc3,0x4d |
