diff options
author | Sanjay Patel <spatel@rotateright.com> | 2017-04-20 20:59:02 +0000 |
---|---|---|
committer | Sanjay Patel <spatel@rotateright.com> | 2017-04-20 20:59:02 +0000 |
commit | fb5b3e773af3e05c7582ea35fbc8b20d8678e649 (patch) | |
tree | db8fc14e22e9e4289140ee0cb8bdbcbe39f5b232 /llvm/test | |
parent | 3106fc476c615d2f868db6e414ff4da4804dd3ff (diff) | |
download | bcm5719-llvm-fb5b3e773af3e05c7582ea35fbc8b20d8678e649.tar.gz bcm5719-llvm-fb5b3e773af3e05c7582ea35fbc8b20d8678e649.zip |
[InstCombine] allow ashr/lshr demanded bits folds with splat constants
llvm-svn: 300888
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/Transforms/InstCombine/shift.ll | 6 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/vector-casts.ll | 6 |
2 files changed, 5 insertions, 7 deletions
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll index 72d361e8b6d..d5f489280a0 100644 --- a/llvm/test/Transforms/InstCombine/shift.ll +++ b/llvm/test/Transforms/InstCombine/shift.ll @@ -1270,8 +1270,7 @@ define <2 x i64> @test_64_splat_vec(<2 x i32> %t) { define <2 x i8> @ashr_demanded_bits_splat(<2 x i8> %x) { ; CHECK-LABEL: @ashr_demanded_bits_splat( -; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> %x, <i8 -128, i8 -128> -; CHECK-NEXT: [[SHR:%.*]] = ashr exact <2 x i8> [[AND]], <i8 7, i8 7> +; CHECK-NEXT: [[SHR:%.*]] = ashr <2 x i8> %x, <i8 7, i8 7> ; CHECK-NEXT: ret <2 x i8> [[SHR]] ; %and = and <2 x i8> %x, <i8 128, i8 128> @@ -1281,8 +1280,7 @@ define <2 x i8> @ashr_demanded_bits_splat(<2 x i8> %x) { define <2 x i8> @lshr_demanded_bits_splat(<2 x i8> %x) { ; CHECK-LABEL: @lshr_demanded_bits_splat( -; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> %x, <i8 -128, i8 -128> -; CHECK-NEXT: [[SHR:%.*]] = lshr exact <2 x i8> [[AND]], <i8 7, i8 7> +; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i8> %x, <i8 7, i8 7> ; CHECK-NEXT: ret <2 x i8> [[SHR]] ; %and = and <2 x i8> %x, <i8 128, i8 128> diff --git a/llvm/test/Transforms/InstCombine/vector-casts.ll b/llvm/test/Transforms/InstCombine/vector-casts.ll index 643ab6c5348..2197c250ace 100644 --- a/llvm/test/Transforms/InstCombine/vector-casts.ll +++ b/llvm/test/Transforms/InstCombine/vector-casts.ll @@ -15,9 +15,9 @@ define <2 x i1> @test1(<2 x i64> %a) { ; The ashr turns into an lshr. define <2 x i64> @test2(<2 x i64> %a) { ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[B:%.*]] = and <2 x i64> %a, <i64 65535, i64 65535> -; CHECK-NEXT: [[T:%.*]] = lshr <2 x i64> [[B]], <i64 1, i64 1> -; CHECK-NEXT: ret <2 x i64> [[T]] +; CHECK-NEXT: [[B:%.*]] = and <2 x i64> %a, <i64 65534, i64 65534> +; CHECK-NEXT: [[TMP1:%.*]] = lshr exact <2 x i64> [[B]], <i64 1, i64 1> +; CHECK-NEXT: ret <2 x i64> [[TMP1]] ; %b = and <2 x i64> %a, <i64 65535, i64 65535> %t = ashr <2 x i64> %b, <i64 1, i64 1> |