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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2019-10-04 22:16:22 +0000 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2019-10-04 22:16:22 +0000 |
| commit | fb5af8b9b93cb270fda7832e24cab9cb62dec16f (patch) | |
| tree | a339bff1c5a427fddaf3ac2f873607087f7e61a6 /llvm/test | |
| parent | f304d4d185d24eec9f0ca84d566da0d51b2344ef (diff) | |
| download | bcm5719-llvm-fb5af8b9b93cb270fda7832e24cab9cb62dec16f.tar.gz bcm5719-llvm-fb5af8b9b93cb270fda7832e24cab9cb62dec16f.zip | |
[InstCombine] Fold 'icmp eq/ne (?trunc (lshr/ashr %x, bitwidth(x)-1)), 0' -> 'icmp sge/slt %x, 0'
We do indeed already get it right in some cases, but only transitively,
with one-use restrictions. Since we only need to produce a single
comparison, it makes sense to match the pattern directly:
https://rise4fun.com/Alive/kPg
llvm-svn: 373802
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/shift.ll | 4 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/sign-bit-test-via-right-shifting-all-other-bits.ll | 18 |
2 files changed, 9 insertions, 13 deletions
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll index 501f015ed73..9ded69ad7b9 100644 --- a/llvm/test/Transforms/InstCombine/shift.ll +++ b/llvm/test/Transforms/InstCombine/shift.ll @@ -428,8 +428,8 @@ define i8 @test28a(i8 %x, i8 %y) { ; CHECK-LABEL: @test28a( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[X:%.*]], 7 -; CHECK-NEXT: [[COND1:%.*]] = icmp eq i8 [[TMP1]], 0 -; CHECK-NEXT: br i1 [[COND1]], label [[BB2:%.*]], label [[BB1:%.*]] +; CHECK-NEXT: [[COND1:%.*]] = icmp slt i8 [[X]], 0 +; CHECK-NEXT: br i1 [[COND1]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK: bb1: ; CHECK-NEXT: ret i8 [[TMP1]] ; CHECK: bb2: diff --git a/llvm/test/Transforms/InstCombine/sign-bit-test-via-right-shifting-all-other-bits.ll b/llvm/test/Transforms/InstCombine/sign-bit-test-via-right-shifting-all-other-bits.ll index fa5cc4349cf..c6507afab1f 100644 --- a/llvm/test/Transforms/InstCombine/sign-bit-test-via-right-shifting-all-other-bits.ll +++ b/llvm/test/Transforms/InstCombine/sign-bit-test-via-right-shifting-all-other-bits.ll @@ -44,9 +44,7 @@ define i1 @highest_bit_test_via_ashr(i32 %data, i32 %nbits) { define i1 @highest_bit_test_via_ashr_with_truncation(i64 %data, i32 %nbits) { ; CHECK-LABEL: @highest_bit_test_via_ashr_with_truncation( -; CHECK-NEXT: [[TMP1:%.*]] = ashr i64 [[DATA:%.*]], 63 -; CHECK-NEXT: [[SIGNBIT:%.*]] = trunc i64 [[TMP1]] to i32 -; CHECK-NEXT: [[ISNEG:%.*]] = icmp ne i32 [[SIGNBIT]], 0 +; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i64 [[DATA:%.*]], 0 ; CHECK-NEXT: ret i1 [[ISNEG]] ; %num_low_bits_to_skip = sub i32 64, %nbits @@ -75,7 +73,7 @@ define i1 @unsigned_sign_bit_extract_extrause(i32 %x) { ; CHECK-LABEL: @unsigned_sign_bit_extract_extrause( ; CHECK-NEXT: [[SIGNBIT:%.*]] = lshr i32 [[X:%.*]], 31 ; CHECK-NEXT: call void @use32(i32 [[SIGNBIT]]) -; CHECK-NEXT: [[ISNEG:%.*]] = icmp ne i32 [[SIGNBIT]], 0 +; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[ISNEG]] ; %signbit = lshr i32 %x, 31 @@ -87,7 +85,7 @@ define i1 @unsigned_sign_bit_extract_extrause__ispositive(i32 %x) { ; CHECK-LABEL: @unsigned_sign_bit_extract_extrause__ispositive( ; CHECK-NEXT: [[SIGNBIT:%.*]] = lshr i32 [[X:%.*]], 31 ; CHECK-NEXT: call void @use32(i32 [[SIGNBIT]]) -; CHECK-NEXT: [[ISNEG:%.*]] = icmp eq i32 [[SIGNBIT]], 0 +; CHECK-NEXT: [[ISNEG:%.*]] = icmp sgt i32 [[X]], -1 ; CHECK-NEXT: ret i1 [[ISNEG]] ; %signbit = lshr i32 %x, 31 @@ -108,7 +106,7 @@ define i1 @signed_sign_bit_extract_extrause(i32 %x) { ; CHECK-LABEL: @signed_sign_bit_extract_extrause( ; CHECK-NEXT: [[SIGNSMEAR:%.*]] = ashr i32 [[X:%.*]], 31 ; CHECK-NEXT: call void @use32(i32 [[SIGNSMEAR]]) -; CHECK-NEXT: [[ISNEG:%.*]] = icmp ne i32 [[SIGNSMEAR]], 0 +; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[X]], 0 ; CHECK-NEXT: ret i1 [[ISNEG]] ; %signsmear = ashr i32 %x, 31 @@ -132,7 +130,7 @@ define i1 @unsigned_sign_bit_extract_with_trunc_extrause(i64 %x) { ; CHECK-NEXT: call void @use64(i64 [[SIGNBIT]]) ; CHECK-NEXT: [[SIGNBIT_NARROW:%.*]] = trunc i64 [[SIGNBIT]] to i32 ; CHECK-NEXT: call void @use32(i32 [[SIGNBIT_NARROW]]) -; CHECK-NEXT: [[ISNEG:%.*]] = icmp ne i32 [[SIGNBIT_NARROW]], 0 +; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i64 [[X]], 0 ; CHECK-NEXT: ret i1 [[ISNEG]] ; %signbit = lshr i64 %x, 63 @@ -144,9 +142,7 @@ define i1 @unsigned_sign_bit_extract_with_trunc_extrause(i64 %x) { } define i1 @signed_sign_bit_extract_trunc(i64 %x) { ; CHECK-LABEL: @signed_sign_bit_extract_trunc( -; CHECK-NEXT: [[SIGNSMEAR:%.*]] = ashr i64 [[X:%.*]], 63 -; CHECK-NEXT: [[SIGNSMEAR_NARROW:%.*]] = trunc i64 [[SIGNSMEAR]] to i32 -; CHECK-NEXT: [[ISNEG:%.*]] = icmp ne i32 [[SIGNSMEAR_NARROW]], 0 +; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i64 [[X:%.*]], 0 ; CHECK-NEXT: ret i1 [[ISNEG]] ; %signsmear = ashr i64 %x, 63 @@ -160,7 +156,7 @@ define i1 @signed_sign_bit_extract_trunc_extrause(i64 %x) { ; CHECK-NEXT: call void @use64(i64 [[SIGNSMEAR]]) ; CHECK-NEXT: [[SIGNSMEAR_NARROW:%.*]] = trunc i64 [[SIGNSMEAR]] to i32 ; CHECK-NEXT: call void @use32(i32 [[SIGNSMEAR_NARROW]]) -; CHECK-NEXT: [[ISNEG:%.*]] = icmp ne i32 [[SIGNSMEAR_NARROW]], 0 +; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i64 [[X]], 0 ; CHECK-NEXT: ret i1 [[ISNEG]] ; %signsmear = ashr i64 %x, 63 |
