summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-04-19 06:14:45 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-04-19 06:14:45 +0000
commitfb1249548fe25e8f0c1fee54f1519aaa4b5bf6f5 (patch)
tree26c433f116048578d6adf7bbbbdecdb0486a054b /llvm/test
parent91328b317bc66a948cd4066e72c0250acefa1639 (diff)
downloadbcm5719-llvm-fb1249548fe25e8f0c1fee54f1519aaa4b5bf6f5.tar.gz
bcm5719-llvm-fb1249548fe25e8f0c1fee54f1519aaa4b5bf6f5.zip
Tighten test case a bit.
Ideally, we would match an S-register to its containing D-register, but that requires arithmetic (divide by 2). llvm-svn: 129756
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/ARM/fcopysign.ll3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/fcopysign.ll b/llvm/test/CodeGen/ARM/fcopysign.ll
index 2b08b03d049..f241c2681cb 100644
--- a/llvm/test/CodeGen/ARM/fcopysign.ll
+++ b/llvm/test/CodeGen/ARM/fcopysign.ll
@@ -45,7 +45,8 @@ define i32 @test4() ssp {
entry:
; SOFT: test4:
; SOFT: vmov.f64 [[REG4:(d[0-9]+)]], #1.000000e+00
-; SOFT: vcvt.f32.f64 {{s[0-9]+}}, [[REG4]]
+; This S-reg must be the first sub-reg of the last D-reg on vbsl.
+; SOFT: vcvt.f32.f64 {{s1?[02468]}}, [[REG4]]
; SOFT: vshr.u64 [[REG4]], [[REG4]], #32
; SOFT: vmov.i32 [[REG5:(d[0-9]+)]], #0x80000000
; SOFT: vbsl [[REG5]], [[REG4]], {{d[0-9]+}}
OpenPOWER on IntegriCloud